KR930020607A - 반도체 장치 - Google Patents

반도체 장치 Download PDF

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Publication number
KR930020607A
KR930020607A KR1019930004773A KR930004773A KR930020607A KR 930020607 A KR930020607 A KR 930020607A KR 1019930004773 A KR1019930004773 A KR 1019930004773A KR 930004773 A KR930004773 A KR 930004773A KR 930020607 A KR930020607 A KR 930020607A
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KR
South Korea
Prior art keywords
oxygen concentration
silicon substrate
semiconductor device
region
interstitial oxygen
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KR1019930004773A
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English (en)
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KR960016219B1 (ko
Inventor
모꾸지 가게야마
요시아끼 마쯔시따
Original Assignee
사또 후미오
가부시끼가이샤 도시바
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Publication date
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Publication of KR930020607A publication Critical patent/KR930020607A/ko
Application granted granted Critical
Publication of KR960016219B1 publication Critical patent/KR960016219B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B13/00—Single-crystal growth by zone-melting; Refining by zone-melting
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/928—Active solid-state devices, e.g. transistors, solid-state diodes with shorted PN or schottky junction other than emitter junction

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

본 발명은 다바이스에 악 영향을 미치는 금속 불순물의 게터링 효과를 가지고, 또 디바이스의 동작에 대해 영향이 없는 산소 농도 분포 구조를 갖는 반도체 장치를 제공한다.
인상법 또는 용액 부유법으로 제조된 실리콘 인고트에서 잘려나온 실리콘 기판을 이용하는 반도체 장치는 상기 실리콘 기판의 디바이스 제작측 표면에서 약10㎛가지의 깊은 영역 내에서 격자간 산소 농도가 상기 표면이외에서, 예를 들면 5× (구 ASTM 환산) 이하의 최소값을 갖는 분포를 가지고, 상기 표면에서 약10㎛의 깊은 영역보다 깊은 영역에 격자간 산소 농도가, 예를 들면 1.2×10

Description

반도체 장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1돈 환원성 분위기 중에서 열처리를 실시한 실리콘 기판 표면 근방의 격자들 사이의 산소 농도 분포를 도시한 그래프.
제2도는 디바이스 표면에서 깊이가 10㎛이내인 최소 격자간 산소 농도와 디바이스 생산성과의 관계를 도시한 그래프.

Claims (3)

  1. 인상법 또는 융액 부유법으로 제조된 실리콘 인고트에서 잘려나온 실리콘 기판을 이용하는 반도체 장치에 있어서, 상기 실리콘 기판의 디바이스 제작측 표면에서 약10㎛까지의 깊은 영역 내에서 격자간 산소 농도가 상기표면 이외에서 최소값을 갖는 분포로 되는 것을 특징으로 하는 반도체 장치.
  2. 제1항에 있어서, 상기 표면에서 약10㎛의 깊은 영역보다 깊은 격자간 산소 농도가 1.2× (구 ASTM 환산) 이상으로 되는 영역의 존재하도록 한 것을 특징으로 하는 반도체 장치.
  3. 제1항에 있어서, 상기 격자간 산소 농도의 최소값이 5 ×10(구 ASTM 환산)이하인 것을 특징으로 하는 반도체 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930004773A 1992-03-27 1993-03-26 반도체 장치 KR960016219B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4071686A JP2535701B2 (ja) 1992-03-27 1992-03-27 半導体装置
JP92-071686 1992-03-27

Publications (2)

Publication Number Publication Date
KR930020607A true KR930020607A (ko) 1993-10-20
KR960016219B1 KR960016219B1 (ko) 1996-12-07

Family

ID=13467690

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930004773A KR960016219B1 (ko) 1992-03-27 1993-03-26 반도체 장치

Country Status (3)

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US (1) US5574307A (ko)
JP (1) JP2535701B2 (ko)
KR (1) KR960016219B1 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07247197A (ja) * 1994-03-09 1995-09-26 Fujitsu Ltd 半導体装置とその製造方法
TW589415B (en) * 1998-03-09 2004-06-01 Shinetsu Handotai Kk Method for producing silicon single crystal wafer and silicon single crystal wafer
US6077343A (en) * 1998-06-04 2000-06-20 Shin-Etsu Handotai Co., Ltd. Silicon single crystal wafer having few defects wherein nitrogen is doped and a method for producing it
DE10024710A1 (de) * 2000-05-18 2001-12-20 Steag Rtp Systems Gmbh Einstellung von Defektprofilen in Kristallen oder kristallähnlichen Strukturen
DE10025871A1 (de) * 2000-05-25 2001-12-06 Wacker Siltronic Halbleitermat Epitaxierte Halbleiterscheibe und Verfahren zu ihrer Herstellung
JP5251137B2 (ja) * 2008-01-16 2013-07-31 株式会社Ｓｕｍｃｏ 単結晶シリコンウェーハおよびその製造方法
EP3113224B1 (en) 2015-06-12 2020-07-08 Canon Kabushiki Kaisha Imaging apparatus, method of manufacturing the same, and camera
JP6861471B2 (ja) * 2015-06-12 2021-04-21 キヤノン株式会社 撮像装置およびその製造方法ならびにカメラ

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51134071A (en) * 1975-05-16 1976-11-20 Nippon Denshi Kinzoku Kk Method to eliminate crystal defects of silicon
JPS59202640A (ja) * 1983-05-02 1984-11-16 Toshiba Corp 半導体ウエハの処理方法
US4548654A (en) * 1983-06-03 1985-10-22 Motorola, Inc. Surface denuding of silicon wafer
US4505759A (en) * 1983-12-19 1985-03-19 Mara William C O Method for making a conductive silicon substrate by heat treatment of oxygenated and lightly doped silicon single crystals
JPS62210627A (ja) * 1986-03-11 1987-09-16 Toshiba Corp 半導体ウエハの製造方法
US4851358A (en) * 1988-02-11 1989-07-25 Dns Electronic Materials, Inc. Semiconductor wafer fabrication with improved control of internal gettering sites using rapid thermal annealing
JP2579680B2 (ja) * 1988-12-28 1997-02-05 東芝セラミックス株式会社 シリコンウェハの熱処理方法
JP2523380B2 (ja) * 1989-10-05 1996-08-07 東芝セラミックス株式会社 シリコンウエハの清浄化方法
US5198881A (en) * 1989-12-28 1993-03-30 Massachusetts Institute Of Technology Barrier layer device processing
US5159429A (en) * 1990-01-23 1992-10-27 International Business Machines Corporation Semiconductor device structure employing a multi-level epitaxial structure and method of manufacturing same
JPH043937A (ja) * 1990-04-20 1992-01-08 Matsushita Electric Ind Co Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
JP2535701B2 (ja) 1996-09-18
US5574307A (en) 1996-11-12
KR960016219B1 (ko) 1996-12-07
JPH0636979A (ja) 1994-02-10

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