KR920010774A - 반도체장치의 제조방법 - Google Patents
반도체장치의 제조방법 Download PDFInfo
- Publication number
- KR920010774A KR920010774A KR1019910021221A KR910021221A KR920010774A KR 920010774 A KR920010774 A KR 920010774A KR 1019910021221 A KR1019910021221 A KR 1019910021221A KR 910021221 A KR910021221 A KR 910021221A KR 920010774 A KR920010774 A KR 920010774A
- Authority
- KR
- South Korea
- Prior art keywords
- manufacturing
- semiconductor device
- substrate surface
- cleaning step
- oxide film
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims 3
- 239000004065 semiconductor Substances 0.000 title claims 3
- 238000004140 cleaning Methods 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims 1
- 229910052801 chlorine Inorganic materials 0.000 claims 1
- 125000001309 chloro group Chemical group Cl* 0.000 claims 1
- 238000001312 dry etching Methods 0.000 claims 1
- 230000005669 field effect Effects 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 229910000040 hydrogen fluoride Inorganic materials 0.000 claims 1
- 239000012535 impurity Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02054—Cleaning before device manufacture, i.e. Begin-Of-Line process combining dry and wet cleaning steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02046—Dry cleaning only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/017—Clean surfaces
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/053—Field effect transistors fets
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/906—Cleaning of wafer as interim step
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/909—Controlled atmosphere
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/974—Substrate surface preparation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
- Weting (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 제1실시예에 있어서 실리콘 기판상에 필드산화막을 형성한 상태를 모식적으로 나타내는 단면도,
제2도는 제1실시예에 있어서 RCA세정을 실시하여 화학적 산화막을 형성한 상태를 나타내는 단면도.
Claims (2)
- 기판표면의 세정공정과, 이 세정공정에 따라서 실시되는 게이트 산화막의 형성공정을 포함하고, 상기 세정공정에 있어서는 적어도 염소원자를 포함하는 물질과 불화수소가 기체상태에서 공존하는 분위기속에 있어서 기판 표면을 드라이 에칭하고 기판 표면의 산화막과 금속불순물을 제거하는 것을 특징으로 하는 MOS형 전계효과 트랜지스터를 포함하는 반도체장치의 제조방법.
- 제1항에 있어서, 상기 세정공정에 있어서의 드라이에칭을 가열 및 감압조건하에서 실시하는 것을 특징으로 하는 반도체장치의 제조방법.※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP90-321750 | 1990-11-16 | ||
JP32175090 | 1990-11-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR920010774A true KR920010774A (ko) | 1992-06-27 |
Family
ID=18136031
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910021221A KR920010774A (ko) | 1990-11-16 | 1991-11-25 | 반도체장치의 제조방법 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5238871A (ko) |
EP (1) | EP0488148A3 (ko) |
JP (1) | JPH0521459A (ko) |
KR (1) | KR920010774A (ko) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5589422A (en) * | 1993-01-15 | 1996-12-31 | Intel Corporation | Controlled, gas phase process for removal of trace metal contamination and for removal of a semiconductor layer |
JP3330218B2 (ja) * | 1994-03-25 | 2002-09-30 | 三菱電機株式会社 | 半導体装置の製造方法,及び半導体装置 |
JP3417665B2 (ja) * | 1994-07-07 | 2003-06-16 | 株式会社東芝 | 半導体装置の製造方法 |
US5966623A (en) * | 1995-10-25 | 1999-10-12 | Eastman Kodak Company | Metal impurity neutralization within semiconductors by fluorination |
JP3676912B2 (ja) * | 1997-08-07 | 2005-07-27 | 株式会社ルネサステクノロジ | 半導体製造装置およびその異物除去方法 |
US5980770A (en) * | 1998-04-16 | 1999-11-09 | Siemens Aktiengesellschaft | Removal of post-RIE polymer on Al/Cu metal line |
US6159859A (en) * | 1998-06-09 | 2000-12-12 | Air Products And Chemicals, Inc. | Gas phase removal of SiO2 /metals from silicon |
US6715497B2 (en) * | 2001-01-02 | 2004-04-06 | International Business Machines Corporation | Treatment to eliminate polysilicon defects induced by metallic contaminants |
US20020176984A1 (en) * | 2001-03-26 | 2002-11-28 | Wilson Smart | Silicon penetration device with increased fracture toughness and method of fabrication |
JP2005275231A (ja) * | 2004-03-26 | 2005-10-06 | Fuji Photo Film Co Ltd | 感光性平版印刷版 |
US20070048991A1 (en) * | 2005-08-23 | 2007-03-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Copper interconnect structures and fabrication method thereof |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3426422A (en) * | 1965-10-23 | 1969-02-11 | Fairchild Camera Instr Co | Method of making stable semiconductor devices |
US4264374A (en) * | 1978-09-25 | 1981-04-28 | International Business Machines Corporation | Cleaning process for p-type silicon surface |
JPH01204427A (ja) * | 1988-02-10 | 1989-08-17 | Hitachi Ltd | 半導体装置 |
US4923828A (en) * | 1989-07-07 | 1990-05-08 | Eastman Kodak Company | Gaseous cleaning method for silicon devices |
-
1991
- 1991-11-25 US US07/796,825 patent/US5238871A/en not_active Expired - Fee Related
- 1991-11-25 KR KR1019910021221A patent/KR920010774A/ko not_active Application Discontinuation
- 1991-11-25 JP JP3309205A patent/JPH0521459A/ja active Pending
- 1991-11-26 EP EP19910120153 patent/EP0488148A3/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
JPH0521459A (ja) | 1993-01-29 |
EP0488148A3 (en) | 1992-08-12 |
US5238871A (en) | 1993-08-24 |
EP0488148A2 (en) | 1992-06-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR850000775A (ko) | 에칭기술 | |
KR920015603A (ko) | 반도체 소자의 격리막 형성방법 | |
KR950021347A (ko) | 반도체장치의 제조방법 | |
KR910001993A (ko) | 반도체장치의 제조방법 | |
KR920010774A (ko) | 반도체장치의 제조방법 | |
KR920017248A (ko) | 반도체 메모리 소자의 커패시터 제조방법 | |
KR960005852A (ko) | 반도체장치의 제조방법 | |
KR940006299A (ko) | 양자소자(量子素子)의 제조방법 | |
KR920013776A (ko) | 전계효과 트랜지스터 | |
KR950027976A (ko) | 반도체 소자의 트렌치 세정 방법 | |
KR880011888A (ko) | 반도체장치의 제조방법 | |
KR920015439A (ko) | 반도체소자의 메탈 콘택 제조방법 | |
KR950007006A (ko) | 반도체 소자의 웰 크린닝 공정방법 | |
KR950007007A (ko) | 반도체 소자의 자연산화막 제거방법 | |
KR920010827A (ko) | 반도체 장치의 소자격리 방법 | |
KR960026165A (ko) | 반도체 소자 콘택홀 형성방법 | |
KR940027085A (ko) | 반도체 소자의 게이트 폴리실리콘막 형성전의 세척 방법 | |
KR920022385A (ko) | 부가 산화막을 갖는 반도체 장치 및 그 제조 방법 | |
KR940001346A (ko) | 반도체 소자분리막 제조방법 | |
KR920013601A (ko) | 모스 트랜지스터 제조방법 | |
KR910019136A (ko) | 반도체 제조방법 | |
KR910020832A (ko) | 딥 서브미크론 게이트의 한정방법 | |
KR920010959A (ko) | 모스 트랜지스터 제조방법 | |
KR940027087A (ko) | 반도체 소자의 크린닝 공정방법 | |
KR930003366A (ko) | 반도체 장치의 소자 분리방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |