KR930011456B1 - 반도체장치 - Google Patents

반도체장치 Download PDF

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KR930011456B1
KR930011456B1 KR1019900009536A KR900009536A KR930011456B1 KR 930011456 B1 KR930011456 B1 KR 930011456B1 KR 1019900009536 A KR1019900009536 A KR 1019900009536A KR 900009536 A KR900009536 A KR 900009536A KR 930011456 B1 KR930011456 B1 KR 930011456B1
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South Korea
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semiconductor device
bonding
film
oxide film
bonding pad
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KR1019900009536A
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KR910001924A (ko
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다카아키 오노
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가부시키가이샤 도시바
아오이 죠이치
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Abstract

내용 없음.

Description

반도체장치
제1도는 본 발명의 1실시예에 따른 반도체장치를 나타낸 단면도.
제2도는 상기 제1도의 반도체장치를 사용하여 동계(銅系) 와이어(wire)를 본딩했을때의 반도체칩을 나타낸 단면도.
제3도는 종래의 반도체장치를 나타낸 단면도.
제4도는 상기 제3도의 반도체장치를 사용하여 동계 와이어를 본딩했을때의 반도체칩을 나타낸 단면도이다.
* 도면의 주요부분에 대한 부호의 설명
12 : 산화막 15 : Al전극
18 : 동계 와이어 20 : 질화막
[산업상의 이용분야]
본 발명은 동계(銅系) 와이어를 본딩와이어로 사용하는 반도체장치의 전극에 관한 것이다.
[종래의 기술 및 문제점]
일반적으로 고주파용 반도체장치나 집적회로 등은 전극을 Al(알루미늄)에 의해 취출하고 있고, 또 이 Al에 의해 산화막 위에 본딩패드를 형성하고 있다.
제3도는 종래의 반도체장치의 단면도를 나타낸 것으로, 실리콘기판(11)의 표면영역에는 P/N접합을 갖는 소자(13; 예컨대, 트랜지스터)가 형성되어 있고, 실리콘기판(11)위에는 산화막(12)이 형성되어 있으며, 이 산화막(12)에는 소정의 장소로 전극을 취출하기 위한 접촉홀(14)가 형성되어 있다. 그리고, 접촉홀(14)을 매개로 Al전극(15)이 취출되고, 본딩패드가 산화막(12)위에 형성되어 있다.
또, 제4도는 상기 반도체장치를 사용하여 동계 와이어를 본딩했을 때의 반도체칩의 단면도를 나타낸 것으로, 이 제4도에서 상기 제3도와 동일한 부분에는 동일한 참조부호를 기재하고, 그에 대한 상세한 설명은 생략한다.
상기 반도체장치가 형성된 반도체칩(16)은 리드프레임(17)에 마운트된 후, 동계(동, 동합금 등)의 와이어(18)에 의해 AL전극(15)과 외부리드가 접속된다. 그런데, 동계 와이어(18)는 본딩와이어 안에서는 딱딱해져서 AL전극(15)를 변형시켜 접합하게 된다. 이 때문에 반도체칩(16)에 대한 손상이 강해져 본딩부 바로 아래의 사화막(12) 또는 그 아래의 실리콘기판(11)까지 크랙(19)이 발생되기 쉽다고 하는 결점이 있다.
또한, 상기 산화막(12)에 크랙(19)이 발생하면 절연이 유지되지 않게되어 그 크랙(19)을 통해 전극간 누설 또는 쇼트에 이르는 문제가 있다.
이와 같이 종래의 기술에는 동계 와이어를 본딩와이어로서 사용하면, 반도체칩에 손상을 주어 크랙 등이 발생한다는 결점이 있었다.
[발명의 목적]
본 발명은 상기한 점을 감안하여 발명된 것으로, 동계 와이어의 본딩에 있어서도 그 손상에 견딜 수 있는 본딩패드를 제공함에 그 목적이 있다.
[발명의 구성]
상기 목적을 달성하기 위한 본 발명은, 반도체기판과, 이 반도체기판 표면에 형성된 절연막, 이 절연막에 선택적으로 설치된 접촉홀, 상기 절연막 위에 형성되면서 상기 접촉홀을 매개로 상기 반도체기판과 접촉되는 금속막으로 이루어진 본딩패드 및 이 본딩패드와 접촉되는 본딩와이어를 갖춘 반도체장치에 있어서, 상기 절연막과 상기 본딩패드간에 상기 절연막 보다도 딱딱한 재질로 이루어진 막을 더 구비함과 더불어 상기 본딩와이어가 등을 포함하는 것을 특징으로 한다.
[적용]
상기와 같이 구성된 본 발명은, 절연산화막과 본딩패드 사이에 상기 절연산화막보다도 딱딱한 규소화합물로 이루어진 막이 설치됨에 따라 상기패드와 외부리드를 동계의 와이어를 사용해서 와이어본딩을 수행해도 패드 위에서의 국부적인 응력집중을 피할 수 있어 그 손상에 견딜 수 있게 된다.
[실시예]
이하, 예시도면을 참조하여 본 발명의 1실시예를 상세히 설명한다.
제1도는 본 발명의 반도체장치를 나타낸 것으로, 제1도에서 상기 제3도에 나타낸 종래의 반도체장치와 동일한 부분에는 동일한 참조부호를 붙이고, 그에 대한 상세한 설명을 생략한다.
제1도에서 실리콘기판(11)의 표면영역에는 P/N접합을 갖는 소자(13;예컨대, 트랜지스터)가 형성되어 있고, 실리콘기판(11)상에는 절연산화막(12;예컨대 SiO2)이 형성되어 있으며, 이 산화막(12)에는 소정의 장소로 전극을 취출하기 위한 접촉홀(14)이 형성되어 있다. 또, 본딩패드의 바로 아래에 구성된 산화막(12)위에는 산화막(12)보다도 딱딱한 규소화합물, 예컨대 질화막(20; SiN4)이 형성되어 있다. 그리고, 접촉홀(14)을 매개로 A1전극(15)이 취출되고, 본딩패드가 산화막(12)위에 질화막(20)을 매개로 형성되어 있다.
제2도는 상기 반도체장치를 사용해서 동계 와이어를 본딩했을때의 반도체칩의 단면도를 나타낸 것으로,이 제2도에서 상기 제1도의 반도체장치와 동일한 부분에는 동일한 참조부호를 붙이고, 그에 대한 상세한 설명은 생략한다.
먼저, 상기 반도체장치가 형성된 반도체칩(16)이 리드프레임(17)에 마운트되고, 이후 리드프레임(17)이 200℃~450℃로 가열된다. 그리고, 동계 외이어(18)가 열압착 또는 진동(초음파)에 의해 반도체칩(16)의 본딩패드에 결합된다.
이때, 동계 와이어(18)의 볼(18a)과 본딩패드의 A1전극(15)이 변형되어 하부에 손상이나 왜곡을 준다. 그러나, 동계 와이어(18)가 본딩되는 AL전극(15)의 하부에는 산화막(12)보다도 딱딱한 질화막(20)이 존재하는 바, 즉 이 질화막(20)을 설치함으로써 국부적인 응력집중을 피할 수 있어 충격완화의 효과를 얻을 수 있게 된다.
이에 따라, 종래 조립후의 초기특성으로서 누설불량, 내압불량이 모두 5-30% 발생하고 있던 것을 본 발명에 의해 이들 불량을 0.01% 이하로 할 수 있게 된다. 또, 수명시험에서도 고온방치테스트, 열사이클테스트 등에서 10배 이상의 수명을 얻을 수 있게 된다.
다음에 , 상기 제1도에 나타낸 반도체장치의 제조방법에 대해 동일한 도면을 참조하면서 설명한다.
먼저, 실리콘기판(11)위에 산화막(12)를 형성한다. 그리고, 산화막(12)에는 소정의 장소에 접촉홀을 개공 한다. 다음에 플라즈마 CVD법에 의해 질화막(20)을 퇴적형성한다. 또, PEP(사진식각 공정)에 의해 이 질화막(20)을 패터닝 한다. 이후, A1막을 퇴적형성하고, 패터닝을 수행하여 본딩패드를 갖는 A1전극(15)를 형성한다.
여기서, A1전극(15)의 스텝 커버리지(step coverage)를 좋게 하기 위해 질화막(20)위에는 CVD법에 의해 산화막을 형성하는 것도 효과적이다.
또, 본딩패드 바로 아래가 되는 규소화합물의 두께는 이 화합물에 의해 와이어 본딩시에 있어서의 충격완화가 효과를 얻을 수 있는 범위가 좋다. 상기 화합물이 질화막(20)인 경우에는 그 두께가 적어도 1,000Å 이상인 것이 좋은 바, 3,000~15,000Å 이 효과적이다.
그런데, 상기 실시예에서는 본딩패드 바로 아래레 설치되는 충격완화를 위한 화합물로서 질화막(20; 예컨대(Si3N4)에 대해 설명했지만, 산화막(12)보다도 딱딱한 화합물이면 이에 제한되지 않는다. 예컨대, SiON 등의 질소화합물 또는 이들의 복합화합물에 의한 규소화합물이라면 마찬가지 효과를 거둘 수 있다.
또, 본 발명을 적용할 수 있는 반도체소자로서는 트랜지스터, 다이오드, 집적회로소자 등은 물론, 모든 도체소자에 대하여 적용가능한 것은 물론이다.
한편, 본원 청구범위의 각 구성요소에 병기된 도면참조부호는 본원 발명의 이해를 용이하게 하기 위한 것으로, 본원 발명의 기술적 범위를 도면에 도시한 실시예로 한정할 의도에서 병기한 것은 아니다.
[발명의 효과]
이상 설명한 바와 같이 본 발명의 반도체장치에 의하면, 다음과 같은 효과를 거둘 수 있다.
즉, 본딩패드로 구성되는 A1전극과 질산화막 사이에 상기 질연산화막보다도 딱딱한 규소화합물, 예컨대 Si3N4를 설치함으로써 동계 와이어의 본딩에 있어서도 그 손상에 견딜 수 있는 본딩패드를 형성할 수 있게 된다.

Claims (1)

  1. 반도체기판(11)과, 이 반도체기판(11) 표면에 형성된 절연막(12), 이 절연막(12)에 선택적으로 설치된 접촉홀(14), 상기 절연막(12)위에 형성되면서 상기 접촉홀(14)을 매개로 상기 반도체기판(11)과 접촉되는 금속막으로 이루어진 본딩패드(15) 및, 이 본딩패드(15)와 접촉되는 본딩 와이어(18)를 갖춘 반도체장치에 있어서, 상기 절연막(12)과 상기 본딩패드(15)간에 절연막(12)보다도 딱딱한 재질로 이루어진 막(20)을 더 구비함과 더불어 상기 본딩 와이어(18)가 동을 포함하는 것을 특징으로 하는 반도체장치.
KR1019900009536A 1989-06-27 1990-06-27 반도체장치 KR930011456B1 (ko)

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US6875687B1 (en) 1999-10-18 2005-04-05 Applied Materials, Inc. Capping layer for extreme low dielectric constant films
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JPH0330347A (ja) 1991-02-08
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JPH0682704B2 (ja) 1994-10-19
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