JPH0682704B2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH0682704B2
JPH0682704B2 JP1164533A JP16453389A JPH0682704B2 JP H0682704 B2 JPH0682704 B2 JP H0682704B2 JP 1164533 A JP1164533 A JP 1164533A JP 16453389 A JP16453389 A JP 16453389A JP H0682704 B2 JPH0682704 B2 JP H0682704B2
Authority
JP
Japan
Prior art keywords
oxide film
film
semiconductor device
copper
bonding pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1164533A
Other languages
English (en)
Other versions
JPH0330347A (ja
Inventor
忠秋 大野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP1164533A priority Critical patent/JPH0682704B2/ja
Priority to EP90112253A priority patent/EP0405501B1/en
Priority to KR1019900009536A priority patent/KR930011456B1/ko
Priority to DE69034071T priority patent/DE69034071T2/de
Publication of JPH0330347A publication Critical patent/JPH0330347A/ja
Priority to US08/037,184 priority patent/US5293073A/en
Publication of JPH0682704B2 publication Critical patent/JPH0682704B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05073—Single internal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05541—Structure
    • H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48799—Principal constituent of the connecting portion of the wire connector being Copper (Cu)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01007—Nitrogen [N]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049—Nitrides composed of metals from groups of the periodic table
    • H01L2924/0504—14th Group
    • H01L2924/05042—Si3N4
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12036—PN diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/201—Temperature ranges
    • H01L2924/20106—Temperature range 200 C=<T<250 C, 473.15 K =<T < 523.15K
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/201—Temperature ranges
    • H01L2924/20107—Temperature range 250 C=<T<300 C, 523.15K =<T< 573.15K
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/201—Temperature ranges
    • H01L2924/20108—Temperature range 300 C=<T<350 C, 573.15K =<T< 623.15K
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/201—Temperature ranges
    • H01L2924/20109—Temperature range 350 C=<T<400 C, 623.15K =<T< 673.15K

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【発明の詳細な説明】 ［発明の目的］ （産業上の利用分野） 本発明は、銅系ワイヤをボンディングワイヤとして使用
する半導体装置の電極に関するものである。
（従来の技術） 一般に、高周波用半導体装置や集積回路などは、電極を
Al（アルミニウム）によって取りだしている。また、こ
のAlによって、酸化膜上にボンディングパットを形成し
ている。
第３図は従来の半導体装置の断面図を示すものである。
シリコン基板11の表面領域にはP/Nジャンクションを有
する素子（例えばトランジスタ）13が形成されている。
また、シリコン基板11上には酸化膜12が形成されてい
る。この酸化膜12には所定の場所に電極を取り出すため
のコンタクトホール14が形成されている。そして、コン
タクトホール14を介してAl電極15が取り出され、ボンデ
ィングパットが酸化膜12上に形成されている。
また、第４図は前記半導体装置を用いて銅系ワイヤをボ
ンディングしたときの半導体チップの断面図を示すもの
である。なお、第４図において、前記第３図と同一の部
分には同じ符号が付してある。
前記半導体装置が形成された半導体チップ16は、リード
フレーム17にマウントされる。この後、銅系（銅、銅合
金等）のワイヤ18により、Al電極15と外部リードとが接
続されることになる。ところが、銅系ワイヤはボンディ
ングワイヤのなかでは硬く、Al電極15を変形させて接合
することになる。このため、半導体チップ16へのダメー
ジが強く、ボンディング部直下の酸化膜12に、又はその
下のシリコン基板11までクラック19を生じやすいという
欠点がある。
なお、酸化膜12にクラック19が発生すれば絶縁が保てな
くなり、クラック19を通じて電極間リーク又はショート
に至り、不都合である。
（発明が解決しようとする課題） このように、従来は、銅系ワイヤをボンディングワイヤ
として使用をすると、半導体チップにダメージを与え、
クラック等が発生するという欠点があった。
よって、本発明は、銅系ワイヤのボンディングにおいて
も、そのダメージに耐えることができるボンディングパ
ットを提供することを目的とする。
〔発明の構成〕
（課題を解決するための手段） 上記目的を達成するために、本発明の半導体装置は、半
導体素子の電極を金属膜によって取りだし、この金属膜
によりボンディングパットを形成するものであり、半導
体基板と、この半導体基板上に形成される絶縁酸化膜
と、この絶縁酸化膜上に形成される、前記絶縁酸化膜よ
りも硬い、窒素又は炭素を含むケイ素化合物よりなる膜
と、このケイ素化合物よりなる膜上に形成される前記金
属膜よりなるボンディングパットとを有している。
（作用） このような半導体装置によれば、絶縁酸化膜とボンディ
ングパットとの間に、前記絶縁酸化膜よりも硬い、ケイ
素化合物よりなる膜が設けられている。これにより、前
記パットと外部リードとを銅系のワイヤを用いてワイヤ
ボンディングを行っても、パット上での局部的な応力集
中を避けることができ、そのダメージに耐えることがで
きる。
（実施例） 以下、図面を参照して本発明の一実施例を詳細に説明す
る。
第１図は本発明の半導体装置を示すものである。なお、
第１図において、前記第３図に示した従来の半導体装置
と同一の部分には同じ符号を付して詳細な説明を省略す
る。
シリコン基板11の表面領域にはP/Nジャンクションを有
する素子（例えばトランジスタ）13が形成されている。
シリコン基板11上には絶縁酸化膜（例えばSiO2）12が形
成されている。この酸化膜12には所定の場所に電極を取
り出すためのコンタクトホール14が形成されている。ま
た、ボンディングパットの直下になる酸化膜12上には、
酸化膜12よりも硬いケイ素化合物、例えば窒化膜（Si3N
4）20が形成されている。そして、コンタクトホール14
を介してAl電極15が取り出され、ボンディングパットが
酸化膜12上に窒化膜20を介して形成されている。
第２図は前記半導体装置を用いて銅系ワイヤをボンディ
ングしたときの半導体チップの断面図を示すものであ
る。なお、第２図において、前記第１図の半導体装置と
同一の部分には同じ符号が付してある。
まず、前記半導体装置が形成された半導体チップ16は、
リードフレーム17にマウントされる。この後、リードフ
レーム17は200℃〜450℃に加熱される。そして、銅系ワ
イヤ18は、熱圧着又は振動（超音波）により半導体チッ
プ16のボンディングパットに接合される。
この時、銅系ワイヤ18のボール18aとボンディングパッ
トのAl電極15は変形し、下部にダメージや歪みを与え
る。しかし、銅系ワイヤ18がボンディングされるAl電極
15の下部には、酸化膜12よりも硬い窒化膜20が存在して
いる。即ち、この窒化膜20を設けることにより、局部的
な応力集中を避けることができ、衝撃緩和の効果が得ら
れる。
これにより、従来、組立後の初期特性として、リーク不
良、耐圧不良が共に５〜30％も発生していたのが、本発
明によって、これらの不良を0.01％以下にすることがで
きる。また、寿命試験においても、高温放置テスト、熱
サイクルテスト等で10倍以上の寿命を得ることができ
る。
次に、前記第１図に示した半導体装置の製造方法につい
て、同図を参照しながら説明する。
まず、シリコン基板11上に酸化膜12を形成する。酸化膜
12には所定の場所にコンタクトホールを開孔する。次
に、プラズマCVD法により窒化膜20を堆積形成する。ま
た、PEP（写真蝕刻工程）により、この窒化膜20をパタ
ーニングする。この後、Al膜を堆積形成し、パターニン
グを行ってボンディングパットを有するAl電極15を形成
する。
ここで、Al電極15のステップカバレージを良くするた
め、窒化膜20上にはCVD法により酸化膜を形成するのも
効果的である。
また、ボンディングパット直下になるケイ素化合物の厚
さは、この化合物によりイヤボンディング時における衝
撃緩和の効果が得られる範囲が良い。なお、前記化合物
が窒化膜20の場合には、その厚さは少なくとも300Å以
上あるのがよく、又500〜3000Åが効果的である。
ところで、前記実施例では、ボンディングパット直下に
設ける衝撃緩和のための化合物として窒化膜（例えばSi
3N4）20について説明してきたが、酸化膜12よりも硬い
化合物であれば、これに限られない。例えば、SiON等の
窒素化合物若しくは炭化ケイ素（SiC）等の炭化物又は
これらの複合化合物によるケイ素化合物であれば、同様
の効果が得られる。
また、本発明が適用できる半導体素子としては、トラン
ジスタ、ダイオード、集積回路素子等はもちろん、全て
の半導体素子について適用できることは言うまでもな
い。
［発明の効果］ 以上、説明したように、本発明の半導体装置によれば、
次のような効果を奏する。
ボンディングパットになるAl電極と、絶縁酸化膜との間
に、前記絶縁酸化膜よりも硬いケイ素化合物、例えばSi
3N4を設けている。よって、銅系ワイヤのボンディング
においても、そのダメージに耐えることができるボンデ
ィングパットを形成することができる。
【図面の簡単な説明】
第１図は本発明の一実施例に係わる半導体装置を示す断
面図、第２図は前記第１図の半導体装置を用いて銅系ワ
イヤをボンディングしたときの半導体チップを示す断面
図、第３図は従来の半導体装置を示す断面図、第４図は
前記第３図の半導体装置を用いて銅系ワイヤをボンディ
ングしたときの半導体チップを示す断面図である。 12……酸化膜、15……Al電極、18……銅系ワイヤ、20…
…窒化膜。

Claims (1)

    【特許請求の範囲】
  1. 【請求項１】半導体素子の電極を金属膜によって取りだ
    し、この金属膜によりボンディングパットを形成する半
    導体装置であって、半導体基板と、この半導体基板上に
    形成される絶縁酸化膜と、この絶縁酸化膜上に形成され
    る、前記絶縁酸化膜よりも硬い、窒素又は炭素を含むケ
    イ素化合物よりなる膜と、このケイ素化合物よりなる膜
    上に形成される前記金属膜よりなるボンディングパット
    とを具備する半導体装置。
JP1164533A 1989-06-27 1989-06-27 半導体装置 Expired - Lifetime JPH0682704B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP1164533A JPH0682704B2 (ja) 1989-06-27 1989-06-27 半導体装置
EP90112253A EP0405501B1 (en) 1989-06-27 1990-06-27 Semiconductor device
KR1019900009536A KR930011456B1 (ko) 1989-06-27 1990-06-27 반도체장치
DE69034071T DE69034071T2 (de) 1989-06-27 1990-06-27 Halbleiteranordnung
US08/037,184 US5293073A (en) 1989-06-27 1993-03-24 Electrode structure of a semiconductor device which uses a copper wire as a bonding wire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1164533A JPH0682704B2 (ja) 1989-06-27 1989-06-27 半導体装置

Publications (2)

Publication Number Publication Date
JPH0330347A JPH0330347A (ja) 1991-02-08
JPH0682704B2 true JPH0682704B2 (ja) 1994-10-19

Family

ID=15794971

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1164533A Expired - Lifetime JPH0682704B2 (ja) 1989-06-27 1989-06-27 半導体装置

Country Status (4)

Country Link
EP (1) EP0405501B1 (ja)
JP (1) JPH0682704B2 (ja)
KR (1) KR930011456B1 (ja)
DE (1) DE69034071T2 (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1107979C (zh) 1995-07-14 2003-05-07 松下电器产业株式会社 半导体器件的电极结构、形成方法及安装体和半导体器件
US6875687B1 (en) 1999-10-18 2005-04-05 Applied Materials, Inc. Capping layer for extreme low dielectric constant films
EP1094506A3 (en) * 1999-10-18 2004-03-03 Applied Materials, Inc. Capping layer for extreme low dielectric constant films
US7612457B2 (en) 2007-06-21 2009-11-03 Infineon Technologies Ag Semiconductor device including a stress buffer

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57113235A (en) * 1980-12-29 1982-07-14 Nec Corp Semiconductor device
JPS5886733A (ja) * 1981-11-18 1983-05-24 Nec Corp 半導体装置
JPS6031243A (ja) * 1983-08-01 1985-02-18 Nec Corp 半導体装置
JPS61196552A (ja) * 1985-02-26 1986-08-30 Nec Corp 半導体集積回路装置
JPS6218060A (ja) * 1985-07-16 1987-01-27 Nec Corp 半導体装置
JPS6232617A (ja) * 1985-08-02 1987-02-12 Matsushita Electronics Corp 半導体装置およびその製造方法
US4949150A (en) * 1986-04-17 1990-08-14 Exar Corporation Programmable bonding pad with sandwiched silicon oxide and silicon nitride layers
JPS63148646A (ja) * 1986-12-12 1988-06-21 Toshiba Corp 半導体装置
JPS6484724A (en) * 1987-09-28 1989-03-30 Nec Corp Semiconductor device

Also Published As

Publication number Publication date
EP0405501A2 (en) 1991-01-02
EP0405501A3 (en) 1991-07-24
KR930011456B1 (ko) 1993-12-08
DE69034071T2 (de) 2004-01-08
KR910001924A (ko) 1991-01-31
DE69034071D1 (de) 2003-06-18
JPH0330347A (ja) 1991-02-08
EP0405501B1 (en) 2003-05-14

Similar Documents

Publication Publication Date Title
JP3383329B2 (ja) 半導体装置の製造方法
US5293073A (en) Electrode structure of a semiconductor device which uses a copper wire as a bonding wire
KR870000350B1 (ko) 다측 배선(多重配線)구조를 가진 전자장치(電子裝置)
JPH0682704B2 (ja) 半導体装置
JPS59229850A (ja) 半導体装置
JP2947223B2 (ja) 半導体装置の製造方法
JP2001094228A (ja) 半導体装置の実装構造
JP2727605B2 (ja) 半導体装置及びその製造方法
KR102371636B1 (ko) 양면 기판 반도체 제조 방법
US20220238468A1 (en) Semiconductor device and method for fabricating the same
US20020106903A1 (en) Manufacturing method of semiconductor device
JPH06333977A (ja) 半導体装置及びその製造方法
JPS5827334A (ja) 半導体装置
JP2559102B2 (ja) 半導体装置
JPH08115947A (ja) 半導体装置の接合構造
JPS6025900Y2 (ja) 半導体装置
JPS6214944B2 (ja)
JPS5823451A (ja) 半導体装置
JPH07142631A (ja) 半導体装置およびその製造方法
JPH0864631A (ja) ボンディングパッド
JP2000031146A (ja) 半導体装置およびその製造方法
JPS5852331B2 (ja) 半導体装置およびその製法
JPH01143237A (ja) 半導体装置
JPH05267500A (ja) 樹脂封止型半導体装置
JPH0797616B2 (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081019

Year of fee payment: 14

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081019

Year of fee payment: 14

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091019

Year of fee payment: 15

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091019

Year of fee payment: 15