KR920008874A - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

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Publication number
KR920008874A
KR920008874A KR1019910017794A KR910017794A KR920008874A KR 920008874 A KR920008874 A KR 920008874A KR 1019910017794 A KR1019910017794 A KR 1019910017794A KR 910017794 A KR910017794 A KR 910017794A KR 920008874 A KR920008874 A KR 920008874A
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South Korea
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manufacturing
semiconductor device
atmosphere
inert gas
gas
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KR1019910017794A
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KR940007587B1 (ko
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야스마사 스이즈
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아오이 죠이치
가부시키가이샤 도시바
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Publication of KR940007587B1 publication Critical patent/KR940007587B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H01L21/2686—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation using incoherent radiation

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Formation Of Insulating Films (AREA)
  • Thin Film Transistor (AREA)
  • Drying Of Semiconductors (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

내용 없음.

Description

반도체장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 미량의 산소를 의도적으로 첨가하여 RTA를 행한 후의 반도체기판표면내에서의 시이트저항치의 분포를 도시한 도면.
제 2 도는 산소농도를 파라메터로서 기판표면의 손상의 유무를 종합적으로 도시한 도면.
제 3 도는 실질적으로 산소를 포함하지 않는 불활성가스분위기중에서 RTA를 행한 후의 반도체기판표면내에서의 시이트저항치의 분포를 도시한 도면이다.

Claims (3)

  1. 표면의 적어도 일부분이 노출되어 있는 반도체기판을 불활성가스분위기중에서 인코헤런트광의 조사에 의해 가열할 때에 상기 불활성가스분위기중에 미량의 산소가스를 의도적으로 첨가하는 것을 특징으로 하는 반도체장치의 제조방법.
  2. 제 1 항에 있어서, 상기 불활성가스분위기는 질소가스와 아르곤가스 및 이들의 혼합가스로 구성되어 거의 대기압과 같은 분위기이고, 또 상기 첨가되는 산소가스의 농도는 상기 불활성가스유량에 대해 10ppm에서 1000ppm 사이에 있는 것을 특징으로 하는 반도체장치의 제조방법
  3. 제 1 항에 있어서, 상기 반도체기판이 노출된 일부분에서의 당해기판표면의 불순물농도는 1.0×1019cm-3이상인 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910017794A 1990-10-16 1991-10-10 반도체장치의 제조방법 KR940007587B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP90-277101 1990-10-16
JP2277101A JPH04152518A (ja) 1990-10-16 1990-10-16 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR920008874A true KR920008874A (ko) 1992-05-28
KR940007587B1 KR940007587B1 (ko) 1994-08-20

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910017794A KR940007587B1 (ko) 1990-10-16 1991-10-10 반도체장치의 제조방법

Country Status (3)

Country Link
US (1) US5279973A (ko)
JP (1) JPH04152518A (ko)
KR (1) KR940007587B1 (ko)

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Also Published As

Publication number Publication date
US5279973A (en) 1994-01-18
JPH04152518A (ja) 1992-05-26
KR940007587B1 (ko) 1994-08-20

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