KR920000968B1 - 다층 세라믹 배선회로기판 및 그 제조방법 - Google Patents

다층 세라믹 배선회로기판 및 그 제조방법 Download PDF

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Publication number
KR920000968B1
KR920000968B1 KR1019860003946A KR860003946A KR920000968B1 KR 920000968 B1 KR920000968 B1 KR 920000968B1 KR 1019860003946 A KR1019860003946 A KR 1019860003946A KR 860003946 A KR860003946 A KR 860003946A KR 920000968 B1 KR920000968 B1 KR 920000968B1
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KR
South Korea
Prior art keywords
wiring circuit
circuit board
weight
mullite
powder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
KR1019860003946A
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English (en)
Korean (ko)
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KR860009605A (ko
Inventor
노부유끼 우시푸사
사토루 오기하라
코우세이 나가야마
히로이찌 시노하라
교죠 토다
Original Assignee
가부시기가이샤 히다찌세이사꾸쇼
미다 가쓰시게
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication of KR860009605A publication Critical patent/KR860009605A/ko
Application granted granted Critical
Publication of KR920000968B1 publication Critical patent/KR920000968B1/ko
Expired legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/692—Ceramics or glasses
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B35/00—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/01—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics
    • C04B35/16—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on silicates other than clay
    • C04B35/18—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on silicates other than clay rich in aluminium oxide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676—Single layer compositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49163—Manufacturing circuit on or in base with sintering of base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24273—Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
    • Y10T428/24322—Composite web or sheet
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Structural Engineering (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Compositions Of Oxide Ceramics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
KR1019860003946A 1985-05-21 1986-05-21 다층 세라믹 배선회로기판 및 그 제조방법 Expired KR920000968B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP109112 1985-05-21
JP60109112A JPS61266350A (ja) 1985-05-21 1985-05-21 配線回路用セラミック基板
JP85-109112 1985-05-21

Publications (2)

Publication Number Publication Date
KR860009605A KR860009605A (ko) 1986-12-23
KR920000968B1 true KR920000968B1 (ko) 1992-01-31

Family

ID=14501863

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860003946A Expired KR920000968B1 (ko) 1985-05-21 1986-05-21 다층 세라믹 배선회로기판 및 그 제조방법

Country Status (5)

Country Link
US (1) US4736276A (enExample)
EP (1) EP0202858B1 (enExample)
JP (1) JPS61266350A (enExample)
KR (1) KR920000968B1 (enExample)
DE (1) DE3682824D1 (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0610927B2 (ja) * 1985-04-05 1994-02-09 株式会社日立製作所 セラミック基板の製造方法
US5015609A (en) * 1986-09-16 1991-05-14 Lanxide Technology Company, Lp Ceramic composite structures having intrinsically fitted encasement members thereon and methods of making the same
US4775596A (en) * 1987-02-18 1988-10-04 Corning Glass Works Composite substrate for integrated circuits
JP2760541B2 (ja) * 1988-03-02 1998-06-04 新光電気工業株式会社 セラミック組成物
DE3814863A1 (de) * 1988-05-02 1989-11-16 Siemens Ag Verfahren zum herstellen von vielschichtenkeramik auf silikatbasis
US4914813A (en) * 1988-11-25 1990-04-10 Innovative Packing Technology Refurbishing of prior used laminated ceramic packages
USRE34291E (en) * 1989-09-27 1993-06-22 Gec-Marconi Electronic Systems Corp. Hybrid module electronics package
US4996630A (en) * 1989-09-27 1991-02-26 Plessey Electronic Systems Corp. Hybrid module electronics package
CA2036771A1 (en) * 1990-02-22 1991-09-30 Jun Inasaka Multilayer ceramic wiring substrate and pin connecting structure
JPH0829993B2 (ja) * 1991-09-23 1996-03-27 インターナショナル・ビジネス・マシーンズ・コーポレイション セラミツク複合構造及びその製造方法
JPH06169174A (ja) * 1992-08-17 1994-06-14 Praxair Technol Inc 多層セラミック構造物からのバインダー除去
US5673478A (en) * 1995-04-28 1997-10-07 Texas Instruments Incorporated Method of forming an electronic device having I/O reroute
US6239485B1 (en) 1998-11-13 2001-05-29 Fujitsu Limited Reduced cross-talk noise high density signal interposer with power and ground wrap
US6081026A (en) * 1998-11-13 2000-06-27 Fujitsu Limited High density signal interposer with power and ground wrap
US6762367B2 (en) * 2002-09-17 2004-07-13 International Business Machines Corporation Electronic package having high density signal wires with low resistance
CN2652088Y (zh) * 2002-09-20 2004-10-27 日本特殊陶业株式会社 由树脂制成的带有插脚的电路板
JP4566866B2 (ja) * 2005-09-07 2010-10-20 新光電気工業株式会社 半導体パッケージ、半導体パッケージの実装構造、半導体パッケージの製造方法
CN108530021A (zh) * 2018-04-16 2018-09-14 广东金意陶陶瓷集团有限公司 一种高导热的电热瓷砖及制作方法
US11882654B2 (en) * 2019-03-29 2024-01-23 Kyocera Corporation Wiring board, electronic device package, and electronic device
CN117303880B (zh) * 2023-09-27 2025-09-09 中国国检测试控股集团股份有限公司 适用于多种建筑陶瓷的预应力增强用涂层浆料及其制备方法和应用

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB678636A (enExample) *
GB736148A (en) * 1952-02-01 1955-09-07 Morgan Crucible Co Ceramic materials
US3773532A (en) * 1972-07-13 1973-11-20 Taylors Sons Co Chas Mullite-chrome refractory
US4272500A (en) * 1978-05-08 1981-06-09 International Business Machines Corporation Process for forming mullite
JPS55139709A (en) * 1979-04-18 1980-10-31 Fujitsu Ltd Method of fabricating mullite substrate
JPS57115895A (en) * 1981-01-12 1982-07-19 Hitachi Ltd Mullite sintered material and method of producing same
US4396720A (en) * 1982-07-06 1983-08-02 Corning Glass Works Transparent glass-ceramics containing mullite
JPS6014494A (ja) * 1983-07-04 1985-01-25 株式会社日立製作所 セラミツク多層配線基板およびその製造方法
JPS60136294A (ja) * 1983-12-23 1985-07-19 株式会社日立製作所 セラミック多層配線回路板
US4528275A (en) * 1984-06-04 1985-07-09 General Electric Company Mullite-cordierite composite ceramic and method for preparation
JPS6136168A (ja) * 1984-07-27 1986-02-20 株式会社日立製作所 多層回路板とその製造方法

Also Published As

Publication number Publication date
US4736276A (en) 1988-04-05
DE3682824D1 (de) 1992-01-23
EP0202858A3 (en) 1987-08-05
EP0202858B1 (en) 1991-12-11
JPH0524107B2 (enExample) 1993-04-06
KR860009605A (ko) 1986-12-23
JPS61266350A (ja) 1986-11-26
EP0202858A2 (en) 1986-11-26

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