KR860009605A - 다층 세라믹 배선 회로 기판 및 그 제조방법 - Google Patents
다층 세라믹 배선 회로 기판 및 그 제조방법 Download PDFInfo
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- KR860009605A KR860009605A KR1019860003946A KR860003946A KR860009605A KR 860009605 A KR860009605 A KR 860009605A KR 1019860003946 A KR1019860003946 A KR 1019860003946A KR 860003946 A KR860003946 A KR 860003946A KR 860009605 A KR860009605 A KR 860009605A
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- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
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- C04B35/01—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics
- C04B35/16—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics based on silicates other than clay
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
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- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
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- H01L2924/156—Material
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- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
- H05K3/4676—Single layer compositions
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10S428/901—Printed circuit
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49163—Manufacturing circuit on or in base with sintering of base
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24273—Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
- Y10T428/24322—Composite web or sheet
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
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- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 본 발명의 다층 세라믹 배선 회로 기판 및 이를 사용한 기능 모듈의 단면도.
Claims (11)
- 일체로 적층되는 다수의 세라믹 절연 기판층, 각 세라믹 절연기판 층상에 형성되는 소정 패턴을 가지는 도체층과 소정 패턴을 가진 각 도체층을 상호 연결하여 소정의 배선회로를 형성하도록 각 세라믹 기판층의 소정 위치에 형성한 관통공 도체들을 구비하며, 도체층과 관통공도체가 텅스텐이나 몰리브덴중의 어느 하나로 제조되게 한 다층 세라믹 배선 회로기판에 있어서, 멀라이트 결정과 알루미늄 산화물 및 이산화규소의 복합 산화물의 몰비를 1 : 0.7∼1로 조성하여 이루어진 세라믹 절연 기판층과, 결정 사이의 간극을 메꾸는 비정질 이산화규소와, 고용체의 결정 내에 용해된 알카리금속 산화물과 알카리 토류 금속 산화물로 이루어진 그룹으로부터 선택된 적어도 한 가지 이상의 물질들로 구성되게 한 것을 특징으로 하는 다층 세라믹 배선 회로 기판.
- 제 1 항에 있어서, 복합 산화물이 실리마나이트, 안달러지트와 키아나이트로 이루어진 그룹으로부터 선택된 적어도 한 가지 이상의 물질로 되게 한 것을 특징으로 하는 다층 세라믹 배선 회로 기판.
- 제 1 항에 있어서, 멀라이트 중의 알루미늄 산화물과 이산화규소의 몰비가 3∼4 : 2로 되게한 것을 특징으로 하는 다층 세라믹 배선 회로 기판.
- 내용 없음
- 제 1 항에 있어서, 세라믹 절연기판층의 유전율이 6.7 이하로 한 것을 특징으로 하는 다층 세라믹 배선 회로 기판.
- 일체로 적층되는 다수의 세라믹 절연 기판층, 각 세라믹 절연기판 층상에 형성되는 소정 패턴을 가지는 도체층과, 소정 패턴을 가진 각 도체층을 상호 연결하여 소정의 배선회로를 형성하도록 각 세라믹 기판층의 소정 위치에 형성한 관통공 도체들을 구비하며, 도체층과 관통공도체가 텅스텐이나 몰리브덴중의 어느 하나로 제조되게 한 다층 세라믹 배선 회로기판을 제조하는 방법에 있어서, 평균 입자 크기가 5㎛인 70중량%의 멀라이트 분말, 평균입자 크기가 2㎛ 이하인 10∼30 중량%의 이산화규소 분말, 평균입자 크기가 1㎛ 이하인 15 중량% 이하의 알루미늄 산화물 분말과, 알카리금속 산화물과 알카리 토류 금속 산화물로 이루어진 그룹으로부터 선택된 적어도 한 가지 이상의 1중량% 이하의 금속 산화물 분말을 혼합하고, 소성 수축율이 도체층과 관통공 도체와 함께 동시에 일정하게 되는 온도 이상에서 가압 성형된 혼합물을 소성하며,그에 따라 제조된 세라믹 절연 기판층이 멀라이트,실리마나이트, 안다러지트와 키나이트의 결정, 결정들 사이의 간극을 메꾸는 비정질 이산화규소와 고용체의 결정 중에 실지로 용해된 알카리 금속 산화물 및 알카리 토류 금속 산화물로 이루어진 그룹으로부터 선택된 적어도 한 가지 이상의 물질로 이루어져서 열팽창계수가 40∼60×10-7/℃이고 유점율이 6.7 이하로 되게 한 것을 특징으로 하는 다층 세라믹 배선 회로 기판을 제조하는 방법.
- 제 6 항에 있어서, 혼합물이 70-80 중량%의 멀라이트, 15-30 중량%의 이산화규소, 5중량% 이하의 산화 알루미늄과 1 중량% 이하의 산화 마그네슘들로 이루어지게 한 것을 특징으로 하는 다층 세라믹 배선 회로 기판을 제조하는 방법.
- 제 7 항에 있어서, 혼합물이 72 중량%의 멀라이트, 25-27 중량%의 이산화규소, 1.0∼2.0 중량%의 이산화 알루미늄과 0.4∼0.8 중량%의 산화 마그네슘들로 이루어지게 한 것을 특징으로 하는 다층 세라믹 배선 회로 기판을 제조하는 방법.
- 제 6 항에 있어서, 혼합물에서 멀라이트 중의 산화 알루미늄과 이산화 규소의 몰비가 3∼4 : 2로 되게 한 것을 특징으로 하는 다층 세라믹 배선 회로 기판을 제조하는 방법.
- 제 6 항에 있어서, 소성온도가 1,550∼1,680℃로 되게 한 것을 특징으로 하는 다층 세라믹 배선 회로 기판을 제조하는 방법.
- 제 610항에 있어서, 소성온도가 1,580∼1,620℃로 되게 한 것을 특징으로 하는 다층 세라믹 배선 회로 기판을 제조하는 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP85-109112 | 1985-05-21 | ||
JP60109112A JPS61266350A (ja) | 1985-05-21 | 1985-05-21 | 配線回路用セラミック基板 |
JP109112 | 1985-05-21 |
Publications (2)
Publication Number | Publication Date |
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KR860009605A true KR860009605A (ko) | 1986-12-23 |
KR920000968B1 KR920000968B1 (ko) | 1992-01-31 |
Family
ID=14501863
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019860003946A KR920000968B1 (ko) | 1985-05-21 | 1986-05-21 | 다층 세라믹 배선회로기판 및 그 제조방법 |
Country Status (5)
Country | Link |
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US (1) | US4736276A (ko) |
EP (1) | EP0202858B1 (ko) |
JP (1) | JPS61266350A (ko) |
KR (1) | KR920000968B1 (ko) |
DE (1) | DE3682824D1 (ko) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0610927B2 (ja) * | 1985-04-05 | 1994-02-09 | 株式会社日立製作所 | セラミック基板の製造方法 |
US5015609A (en) * | 1986-09-16 | 1991-05-14 | Lanxide Technology Company, Lp | Ceramic composite structures having intrinsically fitted encasement members thereon and methods of making the same |
US4775596A (en) * | 1987-02-18 | 1988-10-04 | Corning Glass Works | Composite substrate for integrated circuits |
JP2760541B2 (ja) * | 1988-03-02 | 1998-06-04 | 新光電気工業株式会社 | セラミック組成物 |
DE3814863A1 (de) * | 1988-05-02 | 1989-11-16 | Siemens Ag | Verfahren zum herstellen von vielschichtenkeramik auf silikatbasis |
US4914813A (en) * | 1988-11-25 | 1990-04-10 | Innovative Packing Technology | Refurbishing of prior used laminated ceramic packages |
USRE34291E (en) * | 1989-09-27 | 1993-06-22 | Gec-Marconi Electronic Systems Corp. | Hybrid module electronics package |
US4996630A (en) * | 1989-09-27 | 1991-02-26 | Plessey Electronic Systems Corp. | Hybrid module electronics package |
CA2036771A1 (en) * | 1990-02-22 | 1991-09-30 | Jun Inasaka | Multilayer ceramic wiring substrate and pin connecting structure |
JPH0829993B2 (ja) * | 1991-09-23 | 1996-03-27 | インターナショナル・ビジネス・マシーンズ・コーポレイション | セラミツク複合構造及びその製造方法 |
JPH06169174A (ja) * | 1992-08-17 | 1994-06-14 | Praxair Technol Inc | 多層セラミック構造物からのバインダー除去 |
US5673478A (en) * | 1995-04-28 | 1997-10-07 | Texas Instruments Incorporated | Method of forming an electronic device having I/O reroute |
US6081026A (en) * | 1998-11-13 | 2000-06-27 | Fujitsu Limited | High density signal interposer with power and ground wrap |
US6239485B1 (en) | 1998-11-13 | 2001-05-29 | Fujitsu Limited | Reduced cross-talk noise high density signal interposer with power and ground wrap |
US6762367B2 (en) * | 2002-09-17 | 2004-07-13 | International Business Machines Corporation | Electronic package having high density signal wires with low resistance |
CN100352319C (zh) * | 2002-09-20 | 2007-11-28 | 日本特殊陶业株式会社 | 由树脂制成的带有插脚的电路板 |
JP4566866B2 (ja) * | 2005-09-07 | 2010-10-20 | 新光電気工業株式会社 | 半導体パッケージ、半導体パッケージの実装構造、半導体パッケージの製造方法 |
CN108530021A (zh) * | 2018-04-16 | 2018-09-14 | 广东金意陶陶瓷集团有限公司 | 一种高导热的电热瓷砖及制作方法 |
CN113646883A (zh) * | 2019-03-29 | 2021-11-12 | 京瓷株式会社 | 布线基板、电子装置用封装件以及电子装置 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB678636A (ko) * | ||||
GB736148A (en) * | 1952-02-01 | 1955-09-07 | Morgan Crucible Co | Ceramic materials |
US3773532A (en) * | 1972-07-13 | 1973-11-20 | Taylors Sons Co Chas | Mullite-chrome refractory |
US4272500A (en) * | 1978-05-08 | 1981-06-09 | International Business Machines Corporation | Process for forming mullite |
JPS55139709A (en) * | 1979-04-18 | 1980-10-31 | Fujitsu Ltd | Method of fabricating mullite substrate |
JPS57115895A (en) * | 1981-01-12 | 1982-07-19 | Hitachi Ltd | Mullite sintered material and method of producing same |
US4396720A (en) * | 1982-07-06 | 1983-08-02 | Corning Glass Works | Transparent glass-ceramics containing mullite |
JPS6014494A (ja) * | 1983-07-04 | 1985-01-25 | 株式会社日立製作所 | セラミツク多層配線基板およびその製造方法 |
JPS60136294A (ja) * | 1983-12-23 | 1985-07-19 | 株式会社日立製作所 | セラミック多層配線回路板 |
US4528275A (en) * | 1984-06-04 | 1985-07-09 | General Electric Company | Mullite-cordierite composite ceramic and method for preparation |
JPS6136168A (ja) * | 1984-07-27 | 1986-02-20 | 株式会社日立製作所 | 多層回路板とその製造方法 |
-
1985
- 1985-05-21 JP JP60109112A patent/JPS61266350A/ja active Granted
-
1986
- 1986-05-14 EP EP86303665A patent/EP0202858B1/en not_active Expired - Lifetime
- 1986-05-14 DE DE8686303665T patent/DE3682824D1/de not_active Expired - Lifetime
- 1986-05-21 KR KR1019860003946A patent/KR920000968B1/ko not_active IP Right Cessation
- 1986-05-21 US US06/865,396 patent/US4736276A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US4736276A (en) | 1988-04-05 |
EP0202858A3 (en) | 1987-08-05 |
KR920000968B1 (ko) | 1992-01-31 |
DE3682824D1 (de) | 1992-01-23 |
EP0202858B1 (en) | 1991-12-11 |
JPH0524107B2 (ko) | 1993-04-06 |
EP0202858A2 (en) | 1986-11-26 |
JPS61266350A (ja) | 1986-11-26 |
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