KR910007115A - 수지봉지형 반도체장치와 그 제조방법 - Google Patents

수지봉지형 반도체장치와 그 제조방법 Download PDF

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Publication number
KR910007115A
KR910007115A KR1019900014529A KR900014529A KR910007115A KR 910007115 A KR910007115 A KR 910007115A KR 1019900014529 A KR1019900014529 A KR 1019900014529A KR 900014529 A KR900014529 A KR 900014529A KR 910007115 A KR910007115 A KR 910007115A
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South Korea
Prior art keywords
resin
semiconductor device
mold
encapsulated
lead portion
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KR1019900014529A
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English (en)
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KR930010071B1 (ko
Inventor
아키오 가츠마타
세이이치 히라타
신에츠 후지에다
히로시 시모자와
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
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Publication of KR910007115A publication Critical patent/KR910007115A/ko
Application granted granted Critical
Publication of KR930010071B1 publication Critical patent/KR930010071B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/564—Details not otherwise provided for, e.g. protection against moisture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

내용 없음

Description

수지봉지형 반도체장치와 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 반도체장치의 제1실시예를 나타내는 대각선을 따르는 단면도.
제2도는 캡의 제조예를 나타낸 평면도.
제3도는 모울드공정시 우측절반부분은 대각선을, 좌측절반부분은 중앙선을 따르는 단면을 나타낸 도면.

Claims (5)

  1. 결체용 핀(6)에 의해 지지된 다이패드(1)상에 반도체칩(2)을 마운트하고, 리이드부를 측방향으로 돌출시킨 상태에서 상기 반도체칩을 모을드수지(5)에 의해 수지봉지한 수지봉지형 반도체장치에 있어서, 상기 반도체칩의 주위를 상기 모올드수지에 일체로 고착된 무흡습재료(7)에 의해 덮어 준 것을 특징으로 하는 수지봉지형 반도체 장치.
  2. 결체용 핀(6)에 의해 지지된 다이패드(1)상에 반도체집(1)을 마운트하고, 리이드부를 측방향으로 돌출시킨 상태에서 상기 반도체집을 모울드수지에 의해 수지봉지한 수지봉지형 반도체장치에 있어서, 상기 모울드 수지(5)의 거의 전면을 절연테이프(13)가 내부에 개재된 상태에서 무흡습재료에 의해 덮어 준 것을 특징으로 하는 수지봉지형 반도체 장치.
  3. 결체용 핀(6)에 의해 지지된 다이패드(1)상에 반도체칩(2)을 마운트하고, 리이드부를 측방향으로 돌출시킨 상태에서 상기 반도체칩을 모울드수지(5)에 으해 수지봉지한 수지봉지형 반도체장치에 있어서, 상기 모울드 수지의 표면에 그 모울드수지와의 밀착성이 양호한 금속막(18)을 상기 리이드부와 접촉되지 않도록 형성하고, 이 금속막의 표면에 금속층(19)을 적층시킨 것을 특징으로 하는 수지봉지형 반도체장치.
  4. 1쌍의 컵형상 무흡습재료(7)의 내부에 반도체칩(2)을 위치결정해서 장착하고, 내부에 반도체칩이 장착된 무흡습재료를 모울드금형(10, 11)의 공동부내에 배치한 다음, 이 모울드금형의 공동부내에 모울드수지를 주입해서 상기 무흡습재료를 모울드수지에 일체로 고착시킨 것을 특징으로 하는 수지봉지형 반도체 장치의 제조방법.
  5. 결체용 핀(6)에 의해 지지된 다이패드(1)상에 반도체칩(2)을 마운트하고, 리이드부를 측방향으로 돌출시킨 상태에서 상기 반도체칩을 모울드수지(5)에 의해 수지봉지한 다음, 이 모울드수지의 표면에 무전해도금에 의한 무전해도금층(18)을 상기 리이드부에 접촉되지 않도록 형성한 후, 상기 무전해도금층의 표면에 전해도금에 의한 전해도금층(19)을 형성한 것을 특징으로 하는 수지봉지형 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900014529A 1989-09-14 1990-09-14 수지봉지형 반도체장치와 그 제조방법 KR930010071B1 (ko)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP1-239471 1989-09-14
JP239471 1989-09-14
JP23947189 1989-09-14
JP155729 1990-06-14
JP2-155729 1990-06-14
JP15572990 1990-06-14

Publications (2)

Publication Number Publication Date
KR910007115A true KR910007115A (ko) 1991-04-30
KR930010071B1 KR930010071B1 (ko) 1993-10-14

Family

ID=26483656

Family Applications (1)

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KR1019900014529A KR930010071B1 (ko) 1989-09-14 1990-09-14 수지봉지형 반도체장치와 그 제조방법

Country Status (3)

Country Link
US (1) US5223739A (ko)
JP (1) JP2530056B2 (ko)
KR (1) KR930010071B1 (ko)

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Also Published As

Publication number Publication date
JP2530056B2 (ja) 1996-09-04
KR930010071B1 (ko) 1993-10-14
US5223739A (en) 1993-06-29
JPH04127456A (ja) 1992-04-28

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