KR910005468A - 반도체 집적회로장치 - Google Patents

반도체 집적회로장치 Download PDF

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Publication number
KR910005468A
KR910005468A KR1019900012365A KR900012365A KR910005468A KR 910005468 A KR910005468 A KR 910005468A KR 1019900012365 A KR1019900012365 A KR 1019900012365A KR 900012365 A KR900012365 A KR 900012365A KR 910005468 A KR910005468 A KR 910005468A
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South Korea
Prior art keywords
ground
semiconductor substrate
circuit block
main circuit
terminal
Prior art date
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KR1019900012365A
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English (en)
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KR930011797B1 (ko
Inventor
히로시 다카모토
마코토 세가와
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
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Publication of KR910005468A publication Critical patent/KR910005468A/ko
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Publication of KR930011797B1 publication Critical patent/KR930011797B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

내용 없음

Description

반도체 집적회로장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일실시예에 의한 반도체 집적회로장치에 있어서 보호소자의 배열을 나타낸 회로도.
제2도는 반도체 집적회로장치에 있어서 회로의 블럭 구성을 나타낸 개념도.

Claims (3)

  1. 접지단자를 각각에 가진 회로 블럭을 2개 이상 갖추고, 각각의 접지단자에 대하여, 각각의 상기 회로 블럭이 가지는 전원단자, 출력단자 또는 입력단자가 보호소자에 의해서 각각 접속되어 있고, 각각의 단자간에 과전압이 인가된 경우에 단락해서 과전류를 흘리는 것에 의해서 회로를 보호하는 단략경로를 가진 반도체 집적회로장치에 있어서, 상기 회로 블럭중의, 칩 점유면적이 가장 큰 메인회로 블럭(1)이 가지는 접지단자(102)에 접속되어, 이 메인회로 블럭의 배선영역내에서, 상기 서브회로 블럭 (2,3)에 근접한 위치에 배선된 제1의 접지선(22)과, 상기 회로블럭중의, 상기 메인회로 블럭 의외의 서브회로블럭(2,3)이 가지는 접지단자(105,108)에 접속되어, 이 서브회로 블럭의 배선 영역내에서, 상기 메인회로 블럭에 근접한 위치에 배선된 제2의 접지선(32,42), 상기 제1의 접지선과 상기 제2의 접지선간에 접속된 보호소자(15,16)를 갖추고, 상기 제1 또는 제2의 접지선중 적어도 1개를 지나서 상기 단락경로가 형성되는 것을 특징으로 하는 반도체 집적회로장치.
  2. 제1항에 있어서, 상기 메인회로 블럭을 가지는 전원단자(101)에 접속되어, 이 메인회로 블럭의 배선영역내에서, 상기 제1의 접지선에 근접한 위치에 배선된 전원라인(21)과, 이 전원라인과 상기 제1의 접지선간에 접속된 2개 이상의 보호소자(14)를 그 위에 갖추고, 상기 보호소자는 소정의 간격을 두어 접속되어 있는 것을 특징으로 하는 반도체 집적회로장치.
  3. 제1 또는 제2항에 있어서, 상기 보호소자는 반도체기판(52) 혹은 반도체기판 표면에 형성된 웰을 베이스로 한 바이폴라 트랜지스터, 또는 반도체기판(52)상 혹은 반도체기판 표면에 형성된 웰상의 게이트 산화막(54) 및 게이트전극(55)의 양단에 불순물 확사층(51a,52b)을 형성할 수 있는 MOS형의 트랜지스터, 또는 반도체기판(52) 표면상 혹은 반도체기판 표면에 형성된 웰 표면상의 피일드 산화막(53)의 표면상에 알루미늄 또는 다결정 실리콘으로 이루어진 전극(56)을 형성할 수 있는 피일드형 트랜지스터인 것을 특징으로 하는 반도체 집적회로장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900012365A 1989-08-11 1990-08-11 반도체 집적회로장치 KR930011797B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1209167A JPH065705B2 (ja) 1989-08-11 1989-08-11 半導体集積回路装置
JP1-209167 1989-08-11

Publications (2)

Publication Number Publication Date
KR910005468A true KR910005468A (ko) 1991-03-30
KR930011797B1 KR930011797B1 (ko) 1993-12-21

Family

ID=16568442

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900012365A KR930011797B1 (ko) 1989-08-11 1990-08-11 반도체 집적회로장치

Country Status (5)

Country Link
US (1) US5079612A (ko)
EP (1) EP0412561B1 (ko)
JP (1) JPH065705B2 (ko)
KR (1) KR930011797B1 (ko)
DE (1) DE69013267T2 (ko)

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JPS633055A (ja) * 1986-06-24 1988-01-08 Mitsubishi Chem Ind Ltd インサ−ト成形品
JP2742735B2 (ja) * 1991-07-30 1998-04-22 三菱電機株式会社 半導体集積回路装置およびそのレイアウト設計方法
KR940009605B1 (ko) * 1991-09-16 1994-10-15 삼성전자 주식회사 반도체 메모리의 정전방전 보호장치
EP0901058A1 (en) * 1991-10-30 1999-03-10 Harris Corporation Two stage current mirror
US5272371A (en) * 1991-11-19 1993-12-21 Sgs-Thomson Microelectronics, Inc. Electrostatic discharge protection structure
US5535084A (en) * 1992-07-24 1996-07-09 Kawasaki Steel Corporation Semiconductor integrated circuit having protection circuits
JP2972494B2 (ja) * 1993-06-30 1999-11-08 日本電気株式会社 半導体装置
US5372951A (en) * 1993-10-01 1994-12-13 Advanced Micro Devices, Inc. Method of making a semiconductor having selectively enhanced field oxide areas
JP2636773B2 (ja) * 1995-01-25 1997-07-30 日本電気株式会社 半導体集積回路装置
ATE229230T1 (de) * 1995-04-06 2002-12-15 Infineon Technologies Ag Integrierte halbleiterschaltung mit einem schutzmittel
JP2636804B2 (ja) * 1995-05-30 1997-07-30 日本電気株式会社 半導体装置
JP2834034B2 (ja) * 1995-06-22 1998-12-09 日本電気アイシーマイコンシステム株式会社 半導体装置
AU6388796A (en) * 1995-09-11 1997-04-01 Analog Devices, Inc. Electrostatic discharge protection network and method
KR100211539B1 (ko) * 1995-12-29 1999-08-02 김영환 반도체소자의 정전기방전 보호장치 및 그 제조방법
US5721658A (en) * 1996-04-01 1998-02-24 Micron Technology, Inc. Input/output electrostatic discharge protection for devices with multiple individual power groups
JP3017083B2 (ja) * 1996-04-10 2000-03-06 日本電気株式会社 入出力保護回路
US5875089A (en) * 1996-04-22 1999-02-23 Mitsubishi Denki Kabushiki Kaisha Input protection circuit device
US5757208A (en) * 1996-05-01 1998-05-26 Motorola, Inc. Programmable array and method for routing power busses therein
AU6964698A (en) * 1997-04-16 1998-11-11 Board Of Trustees Of The Leland Stanford Junior University Distributed esd protection device for high speed integrated circuits
US6445039B1 (en) * 1998-11-12 2002-09-03 Broadcom Corporation System and method for ESD Protection
US7687858B2 (en) * 1999-01-15 2010-03-30 Broadcom Corporation System and method for ESD protection
US8405152B2 (en) 1999-01-15 2013-03-26 Broadcom Corporation System and method for ESD protection
WO2000042659A2 (en) * 1999-01-15 2000-07-20 Broadcom Corporation System and method for esd protection
AU2001273434A1 (en) * 2000-07-13 2002-01-30 Broadcom Corporation Methods and systems for improving esd clamp response time
DE10102354C1 (de) * 2001-01-19 2002-08-08 Infineon Technologies Ag Halbleiter-Bauelement mit ESD-Schutz
US6947273B2 (en) * 2001-01-29 2005-09-20 Primarion, Inc. Power, ground, and routing scheme for a microprocessor power regulator
FR2831328A1 (fr) * 2001-10-23 2003-04-25 St Microelectronics Sa Protection d'un circuit integre contre des decharges electrostatiques et autres surtensions
JP3908669B2 (ja) * 2003-01-20 2007-04-25 株式会社東芝 静電気放電保護回路装置
EP1701385A1 (en) * 2003-11-27 2006-09-13 Matsushita Electric Industrial Co., Ltd. Semiconductor device comprising electrostatic breakdown protection element
US20070158817A1 (en) * 2004-03-12 2007-07-12 Rohm Co., Ltd. Semiconductor device
US7439592B2 (en) * 2004-12-13 2008-10-21 Broadcom Corporation ESD protection for high voltage applications
US7505238B2 (en) * 2005-01-07 2009-03-17 Agnes Neves Woo ESD configuration for low parasitic capacitance I/O
JP2006237101A (ja) 2005-02-23 2006-09-07 Nec Electronics Corp 半導体集積回路装置
JP5337173B2 (ja) * 2011-01-07 2013-11-06 ルネサスエレクトロニクス株式会社 半導体装置

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US4990802A (en) * 1988-11-22 1991-02-05 At&T Bell Laboratories ESD protection for output buffers

Also Published As

Publication number Publication date
DE69013267T2 (de) 1995-03-16
EP0412561B1 (en) 1994-10-12
EP0412561A3 (en) 1991-05-29
JPH0372666A (ja) 1991-03-27
KR930011797B1 (ko) 1993-12-21
EP0412561A2 (en) 1991-02-13
JPH065705B2 (ja) 1994-01-19
DE69013267D1 (de) 1994-11-17
US5079612A (en) 1992-01-07

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