KR900008025B1 - A gate array with transistor in wiring region - Google Patents

A gate array with transistor in wiring region

Info

Publication number
KR900008025B1
KR900008025B1 KR8801182A KR880001182A KR900008025B1 KR 900008025 B1 KR900008025 B1 KR 900008025B1 KR 8801182 A KR8801182 A KR 8801182A KR 880001182 A KR880001182 A KR 880001182A KR 900008025 B1 KR900008025 B1 KR 900008025B1
Authority
KR
South Korea
Prior art keywords
gate array
cell
channel
interconnection
transistor
Prior art date
Application number
KR8801182A
Other languages
English (en)
Other versions
KR890013895A (ko
Inventor
Hajime Kubosawa
Mitsku Naito
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP62027785A external-priority patent/JPS63194348A/ja
Priority claimed from JP23302287A external-priority patent/JPH0750775B2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of KR890013895A publication Critical patent/KR890013895A/ko
Application granted granted Critical
Publication of KR900008025B1 publication Critical patent/KR900008025B1/ko

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits
    • H01L27/11803Masterslice integrated circuits using field effect technology
    • H01L27/11807CMOS gate arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/923Active solid-state devices, e.g. transistors, solid-state diodes with means to optimize electrical conductor current carrying capacity, e.g. particular conductor aspect ratio

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
KR8801182A 1987-02-09 1988-02-09 A gate array with transistor in wiring region KR900008025B1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP62027785A JPS63194348A (ja) 1987-02-09 1987-02-09 ゲ−トアレイ
JP???62-27785 1987-02-09
JP23302287A JPH0750775B2 (ja) 1987-09-17 1987-09-17 ゲートアレイ
JP???62-233022 1987-09-17

Publications (2)

Publication Number Publication Date
KR890013895A KR890013895A (ko) 1989-09-26
KR900008025B1 true KR900008025B1 (en) 1990-10-29

Family

ID=26365761

Family Applications (1)

Application Number Title Priority Date Filing Date
KR8801182A KR900008025B1 (en) 1987-02-09 1988-02-09 A gate array with transistor in wiring region

Country Status (4)

Country Link
US (1) US4851891A (ko)
EP (1) EP0278463B1 (ko)
KR (1) KR900008025B1 (ko)
DE (1) DE3850790T2 (ko)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2712079B2 (ja) * 1988-02-15 1998-02-10 株式会社東芝 半導体装置
JPH02177457A (ja) * 1988-12-28 1990-07-10 Hitachi Ltd 半導体装置
US5301349A (en) * 1988-12-28 1994-04-05 Kabushiki Kaisha Toshiba Single chip computer having ground wire formed immediately parallel a data bus and drivers formed directly under the data bus for high speed data transfer
JP2721607B2 (ja) * 1991-11-25 1998-03-04 三菱電機株式会社 半導体装置及びその製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58139446A (ja) * 1982-02-15 1983-08-18 Nec Corp 半導体集積回路装置
JPS5966145A (ja) * 1982-10-08 1984-04-14 Toshiba Corp マスタ−スライス半導体装置
KR890004568B1 (ko) * 1983-07-09 1989-11-15 후지쑤가부시끼가이샤 마스터슬라이스형 반도체장치
JPS6047441A (ja) * 1983-08-26 1985-03-14 Fujitsu Ltd 半導体集積回路
JPS6074644A (ja) * 1983-09-30 1985-04-26 Fujitsu Ltd Cmosゲ−トアレ−

Also Published As

Publication number Publication date
DE3850790D1 (de) 1994-09-01
US4851891A (en) 1989-07-25
DE3850790T2 (de) 1994-12-22
EP0278463A2 (en) 1988-08-17
EP0278463B1 (en) 1994-07-27
KR890013895A (ko) 1989-09-26
EP0278463A3 (en) 1990-05-23

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Legal Events

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Payment date: 20031023

Year of fee payment: 14

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