KR900002330A - 스태틱 랜덤 액세스 메모리장치 - Google Patents
스태틱 랜덤 액세스 메모리장치 Download PDFInfo
- Publication number
- KR900002330A KR900002330A KR1019890009743A KR890009743A KR900002330A KR 900002330 A KR900002330 A KR 900002330A KR 1019890009743 A KR1019890009743 A KR 1019890009743A KR 890009743 A KR890009743 A KR 890009743A KR 900002330 A KR900002330 A KR 900002330A
- Authority
- KR
- South Korea
- Prior art keywords
- active element
- random access
- memory device
- static random
- access memory
- Prior art date
Links
- 230000003068 static effect Effects 0.000 title claims 3
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
- H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/903—FET configuration adapted for use as static memory cell
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 1실시예를 표시하는 적층형 SRAM의 메모리 셀(memory cell) 회로의 개념도.
제2a도 및 제2b도는 제1도에 표시된 SRAM셀의 상측 및 하측의 능동소자층을 표시하는 평면도.
제3도는 제1도에 표시된 SRAM셀의 상측의 능동소자층상에 형성된 LOCOS를 표시하는 단면도.
Claims (1)
- 절연층을 세워서 분리된 제1 및 제2의 능동소자층에 걸쳐 형성된 메모리 셀을 포함하는 적층형 스태틱 랜덤 액세스 메모리장치이고 상기 메모리 셀은 상기 제1 및 제2의 능동소자층에 걸쳐 형성된 플립플롭 수단을 포함하고 상기 플립플롭수단이 그의 공용되는 입출력이 상기 제1의 능동소자층상에 설정되어 상기 수단과 상기 제1의 능동소자층상에 설정되고 상기 플립플롭수단을 입출력 제어하기 위한 신호를 제공하기 위한 원드선수단과 상기 제1의 능동소자층상에 설정되고 상기 플립플롭수단에 데이터를 주어 동시에 기억된 데이터 신호를 받기위한 비트선 수단과 상기 제1의 능동소자층상에 동시에 상기 플립플롭수단의 상기 입출력 상기 비트선 수단 및 상기 워드선 수단의 사이에 설정되어 상기 워드선 수단에서 주어진 신호를 응답하여 상기 플롭플롭수단의 상기 입출려과 상기 비트선 수단의 사이를 전기적으로 접속하는 스위칭 수단을 포함하는 스태틱 랜덤 액세스 메모리장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63171521A JPH0770623B2 (ja) | 1988-07-08 | 1988-07-08 | スタティックランダムアクセスメモリ装置 |
JP88-171521 | 1988-07-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR900002330A true KR900002330A (ko) | 1990-02-28 |
KR920001078B1 KR920001078B1 (ko) | 1992-02-01 |
Family
ID=15924658
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890009743A KR920001078B1 (ko) | 1988-07-08 | 1989-07-08 | 스태틱 랜덤 액세스 메모리(static ramdom access memory)장치 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5001539A (ko) |
JP (1) | JPH0770623B2 (ko) |
KR (1) | KR920001078B1 (ko) |
Families Citing this family (41)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5241204A (en) * | 1990-07-25 | 1993-08-31 | Sony Corporation | Semiconductor memory |
JPH04224244A (ja) * | 1990-12-21 | 1992-08-13 | Honda Motor Co Ltd | エンジンの空燃比制御装置 |
US5145799A (en) * | 1991-01-30 | 1992-09-08 | Texas Instruments Incorporated | Stacked capacitor SRAM cell |
JP3015186B2 (ja) * | 1991-03-28 | 2000-03-06 | 三菱電機株式会社 | 半導体記憶装置とそのデータの読み出しおよび書き込み方法 |
JPH04345992A (ja) * | 1991-05-24 | 1992-12-01 | Fujitsu Ltd | スタティックram |
US5243203A (en) * | 1991-11-04 | 1993-09-07 | Motorola, Inc. | Compact transistor pair layout and method thereof |
JP3009788B2 (ja) * | 1991-11-15 | 2000-02-14 | 日本特殊陶業株式会社 | 集積回路用パッケージ |
US5334861A (en) * | 1992-05-19 | 1994-08-02 | Motorola Inc. | Semiconductor memory cell |
JP2665644B2 (ja) * | 1992-08-11 | 1997-10-22 | 三菱電機株式会社 | 半導体記憶装置 |
DE69332966T2 (de) * | 1992-09-04 | 2004-02-19 | Mitsubishi Denki K.K. | Halbleiterspeicherbauelement |
JPH06140631A (ja) * | 1992-10-28 | 1994-05-20 | Ryoden Semiconductor Syst Eng Kk | 電界効果型薄膜トランジスタおよびその製造方法 |
US5435888A (en) * | 1993-12-06 | 1995-07-25 | Sgs-Thomson Microelectronics, Inc. | Enhanced planarization technique for an integrated circuit |
US5395785A (en) * | 1993-12-17 | 1995-03-07 | Sgs-Thomson Microelectronics, Inc. | SRAM cell fabrication with interlevel dielectric planarization |
KR950021242A (ko) * | 1993-12-28 | 1995-07-26 | 김광호 | 다결정 실리콘 박막 트랜지스터 및 그 제조 방법 |
US5670803A (en) * | 1995-02-08 | 1997-09-23 | International Business Machines Corporation | Three-dimensional SRAM trench structure and fabrication method therefor |
JP2996168B2 (ja) * | 1996-02-23 | 1999-12-27 | 日本電気株式会社 | 半導体メモリ集積回路装置 |
CN100388499C (zh) * | 1996-03-28 | 2008-05-14 | 英特尔公司 | 具有垂直层叠跨接的存储单元设计 |
US6140684A (en) * | 1997-06-24 | 2000-10-31 | Stmicroelectronic, Inc. | SRAM cell structure with dielectric sidewall spacers and drain and channel regions defined along sidewall spacers |
US6140163A (en) * | 1997-07-11 | 2000-10-31 | Advanced Micro Devices, Inc. | Method and apparatus for upper level substrate isolation integrated with bulk silicon |
US6483736B2 (en) | 1998-11-16 | 2002-11-19 | Matrix Semiconductor, Inc. | Vertically stacked field programmable nonvolatile memory and method of fabrication |
US8575719B2 (en) | 2000-04-28 | 2013-11-05 | Sandisk 3D Llc | Silicon nitride antifuse for use in diode-antifuse memory arrays |
US6888750B2 (en) * | 2000-04-28 | 2005-05-03 | Matrix Semiconductor, Inc. | Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication |
EP2323164B1 (en) | 2000-08-14 | 2015-11-25 | SanDisk 3D LLC | Multilevel memory array and method for making same |
US7352199B2 (en) | 2001-02-20 | 2008-04-01 | Sandisk Corporation | Memory card with enhanced testability and methods of making and using the same |
US6897514B2 (en) * | 2001-03-28 | 2005-05-24 | Matrix Semiconductor, Inc. | Two mask floating gate EEPROM and method of making |
US6525953B1 (en) | 2001-08-13 | 2003-02-25 | Matrix Semiconductor, Inc. | Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication |
US6841813B2 (en) * | 2001-08-13 | 2005-01-11 | Matrix Semiconductor, Inc. | TFT mask ROM and method for making same |
US6843421B2 (en) | 2001-08-13 | 2005-01-18 | Matrix Semiconductor, Inc. | Molded memory module and method of making the module absent a substrate support |
US6593624B2 (en) | 2001-09-25 | 2003-07-15 | Matrix Semiconductor, Inc. | Thin film transistors with vertically offset drain regions |
US6624485B2 (en) | 2001-11-05 | 2003-09-23 | Matrix Semiconductor, Inc. | Three-dimensional, mask-programmed read only memory |
US6731011B2 (en) * | 2002-02-19 | 2004-05-04 | Matrix Semiconductor, Inc. | Memory module having interconnected and stacked integrated circuits |
US6853049B2 (en) | 2002-03-13 | 2005-02-08 | Matrix Semiconductor, Inc. | Silicide-silicon oxide-semiconductor antifuse device and method of making |
US6737675B2 (en) | 2002-06-27 | 2004-05-18 | Matrix Semiconductor, Inc. | High density 3D rail stack arrays |
KR100678461B1 (ko) * | 2004-11-08 | 2007-02-02 | 삼성전자주식회사 | 상부 및 하부 셀 게이트 패턴들과 접촉하는 랜딩 패드를갖는 에스 램들 및 그 형성방법들 |
US9257152B2 (en) * | 2012-11-09 | 2016-02-09 | Globalfoundries Inc. | Memory architectures having wiring structures that enable different access patterns in multiple dimensions |
JP2014222740A (ja) * | 2013-05-14 | 2014-11-27 | 株式会社東芝 | 半導体記憶装置 |
US9627395B2 (en) | 2015-02-11 | 2017-04-18 | Sandisk Technologies Llc | Enhanced channel mobility three-dimensional memory structure and method of making thereof |
US9478495B1 (en) | 2015-10-26 | 2016-10-25 | Sandisk Technologies Llc | Three dimensional memory device containing aluminum source contact via structure and method of making thereof |
JP6807725B2 (ja) * | 2015-12-22 | 2021-01-06 | 株式会社半導体エネルギー研究所 | 半導体装置、表示パネル、及び電子機器 |
US10490142B2 (en) | 2016-01-29 | 2019-11-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, display device, and electronic device |
US10490116B2 (en) | 2016-07-06 | 2019-11-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, memory device, and display system |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0087979B1 (en) * | 1982-03-03 | 1989-09-06 | Fujitsu Limited | A semiconductor memory device |
JPH0665228B2 (ja) * | 1984-07-24 | 1994-08-22 | 日本電気株式会社 | 半導体記憶装置 |
-
1988
- 1988-07-08 JP JP63171521A patent/JPH0770623B2/ja not_active Expired - Lifetime
-
1989
- 1989-04-13 US US07/337,702 patent/US5001539A/en not_active Expired - Fee Related
- 1989-07-08 KR KR1019890009743A patent/KR920001078B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US5001539A (en) | 1991-03-19 |
JPH0221654A (ja) | 1990-01-24 |
KR920001078B1 (ko) | 1992-02-01 |
JPH0770623B2 (ja) | 1995-07-31 |
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Payment date: 19990128 Year of fee payment: 8 |
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