KR900001023A - 트랜치 분리를 이용한 eprom 셀 및 이의 제조방법 - Google Patents

트랜치 분리를 이용한 eprom 셀 및 이의 제조방법 Download PDF

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Publication number
KR900001023A
KR900001023A KR1019880007986A KR880007986A KR900001023A KR 900001023 A KR900001023 A KR 900001023A KR 1019880007986 A KR1019880007986 A KR 1019880007986A KR 880007986 A KR880007986 A KR 880007986A KR 900001023 A KR900001023 A KR 900001023A
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South Korea
Prior art keywords
oxide film
cell
forming
gate
trench
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KR1019880007986A
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English (en)
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KR970000652B1 (ko
Inventor
이상수
Original Assignee
이만용
금성 반도체 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 이만용, 금성 반도체 주식회사 filed Critical 이만용
Priority to KR1019880007986A priority Critical patent/KR970000652B1/ko
Priority to NL8901545A priority patent/NL194183C/nl
Priority to DE3920451A priority patent/DE3920451C2/de
Priority to FR8908469A priority patent/FR2633777B1/fr
Priority to JP1166474A priority patent/JPH02119185A/ja
Publication of KR900001023A publication Critical patent/KR900001023A/ko
Priority to US07/804,478 priority patent/US5223731A/en
Priority to US08/051,621 priority patent/US5296397A/en
Application granted granted Critical
Publication of KR970000652B1 publication Critical patent/KR970000652B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7886—Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Element Separation (AREA)

Abstract

내용 없음

Description

트랜치 분리를 이용한 EPROM셀 및 이의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 EPROM셀을 나타내는 단면도이고,
제3도는 본 발명에 따른 EPROM셀의 제조방법을 단계적으로 나타낸 단면도이다.

Claims (2)

  1. 실리콘 기판에 게이트 산화막과 폴리간(interpoly)산화막으로서 동시에 사용되는 산화막, 제1폴리층으로서 부유게이트, N형으로 도핑된 컨트롤게이트, 두꺼운 산화막으로된 트렌치 분리층, 두꺼운 산화막으로된 전계 산화막, N형으로 도핑된 실리콘으로서 셀 소오스, N형으로 도핑된 실리콘으로서 셀 드레인 및 셀 채널부로 형성되어 셀의 채널부분을 컨트롤 게이트와 완전히 분리시키고 하나의 폴리층만을 갖는 것을 특징으로 하는 EPROM설
  2. 실리콘 기판상에 우물 및 활성영역을 형성하고 셀에 트랜치 영역을 형성시켜 트랜치 에칭을 행한 후 산화막으로 채워 질화막을 최종점으로 하여 산화막을 에칭하고 이어서 질화막을 제거하고, 이어서 셀 마스크를 사용하여 셀의 컨트롤 게이트 부분을 도핑하고 산화막을 제거한 후 게이트 산화막을 증착하고 제1폴리층을 형성시켜 부유게이트로 형성하고 마스킹 작업을 한 후 N+소오스 및 N+드레인의 영역을 형성시키는 것으로 이루어진 EPROM셀의 제조방법
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880007986A 1988-06-30 1988-06-30 트랜치 분리를 이용한 eprom 셀 및 이의 제조방법 KR970000652B1 (ko)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1019880007986A KR970000652B1 (ko) 1988-06-30 1988-06-30 트랜치 분리를 이용한 eprom 셀 및 이의 제조방법
NL8901545A NL194183C (nl) 1988-06-30 1989-06-20 EPROM-cel met gleuf-isolatie, en werkwijze voor het vervaardigen hiervan.
DE3920451A DE3920451C2 (de) 1988-06-30 1989-06-22 EPROM-Zellstruktur mit einer Graben-Isolation und Verfahren zur Herstellung derselben
FR8908469A FR2633777B1 (fr) 1988-06-30 1989-06-26 Cellule eprom utilisant un isolement de tranchee et son procede de fabrication
JP1166474A JPH02119185A (ja) 1988-06-30 1989-06-28 Ｅｐｒｏｍセル
US07/804,478 US5223731A (en) 1988-06-30 1991-12-09 EPROM cell using trench isolation to provide leak current immunity
US08/051,621 US5296397A (en) 1988-06-30 1993-04-22 Method for manufacturing an EPROM cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019880007986A KR970000652B1 (ko) 1988-06-30 1988-06-30 트랜치 분리를 이용한 eprom 셀 및 이의 제조방법

Publications (2)

Publication Number Publication Date
KR900001023A true KR900001023A (ko) 1990-01-31
KR970000652B1 KR970000652B1 (ko) 1997-01-16

Family

ID=19275680

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880007986A KR970000652B1 (ko) 1988-06-30 1988-06-30 트랜치 분리를 이용한 eprom 셀 및 이의 제조방법

Country Status (5)

Country Link
JP (1) JPH02119185A (ko)
KR (1) KR970000652B1 (ko)
DE (1) DE3920451C2 (ko)
FR (1) FR2633777B1 (ko)
NL (1) NL194183C (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100701179B1 (ko) * 2006-03-24 2007-03-28 주식회사 대우일렉트로닉스 전자레인지의 컨벡션모터 냉각장치
KR100790044B1 (ko) * 2006-03-09 2008-01-02 엘지전자 주식회사 전기 호브의 냉각장치

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0354457B1 (en) * 1988-08-08 1994-06-22 National Semiconductor Corporation A bipolar field-effect electrically erasable programmable read only memory cell and method of manufacture
JP3083547B2 (ja) 1990-07-12 2000-09-04 株式会社日立製作所 半導体集積回路装置
DE4200620C2 (de) * 1992-01-13 1994-10-06 Eurosil Electronic Gmbh Floating-Gate-EEPROM-Zelle mit Sandwichkoppelkapaziztät
KR101684116B1 (ko) 2015-05-26 2016-12-08 현대자동차주식회사 차량용 공조 제어 방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985001836A1 (en) * 1983-10-11 1985-04-25 American Telephone & Telegraph Company Semiconductor integrated circuits containing complementary metal oxide semiconductor devices
JPS60260147A (ja) * 1984-06-06 1985-12-23 Fujitsu Ltd 半導体装置
US4698900A (en) * 1986-03-27 1987-10-13 Texas Instruments Incorporated Method of making a non-volatile memory having dielectric filled trenches

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100790044B1 (ko) * 2006-03-09 2008-01-02 엘지전자 주식회사 전기 호브의 냉각장치
KR100701179B1 (ko) * 2006-03-24 2007-03-28 주식회사 대우일렉트로닉스 전자레인지의 컨벡션모터 냉각장치

Also Published As

Publication number Publication date
KR970000652B1 (ko) 1997-01-16
JPH02119185A (ja) 1990-05-07
DE3920451C2 (de) 1993-12-02
DE3920451A1 (de) 1990-01-04
FR2633777B1 (fr) 1993-12-31
FR2633777A1 (fr) 1990-01-05
NL194183B (nl) 2001-04-02
NL8901545A (nl) 1990-01-16
NL194183C (nl) 2001-08-03

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