KR890013728A - 취화수소 또는 취소로 건식 식각하는 방법 - Google Patents
취화수소 또는 취소로 건식 식각하는 방법 Download PDFInfo
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- KR890013728A KR890013728A KR1019890001415A KR890001415A KR890013728A KR 890013728 A KR890013728 A KR 890013728A KR 1019890001415 A KR1019890001415 A KR 1019890001415A KR 890001415 A KR890001415 A KR 890001415A KR 890013728 A KR890013728 A KR 890013728A
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- 238000001312 dry etching Methods 0.000 title claims description 6
- RWSOTUBLDIXVET-UHFFFAOYSA-N Dihydrogen sulfide Chemical compound S RWSOTUBLDIXVET-UHFFFAOYSA-N 0.000 title claims 3
- 229910000037 hydrogen sulfide Inorganic materials 0.000 title claims 3
- 238000005530 etching Methods 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 20
- 238000001020 plasma etching Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 claims 23
- 239000007789 gas Substances 0.000 claims 12
- 239000000126 substance Substances 0.000 claims 8
- 239000001257 hydrogen Substances 0.000 claims 7
- 229910052739 hydrogen Inorganic materials 0.000 claims 7
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims 4
- 229910052799 carbon Inorganic materials 0.000 claims 4
- 150000002431 hydrogen Chemical class 0.000 claims 3
- 239000011368 organic material Substances 0.000 claims 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 2
- 125000004430 oxygen atom Chemical group O* 0.000 claims 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 2
- 229910052710 silicon Inorganic materials 0.000 claims 2
- 239000010703 silicon Substances 0.000 claims 2
- 229910052581 Si3N4 Inorganic materials 0.000 claims 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 239000006185 dispersion Substances 0.000 claims 1
- 230000005284 excitation Effects 0.000 claims 1
- 239000011261 inert gas Substances 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- 229910052760 oxygen Inorganic materials 0.000 claims 1
- 229920002120 photoresistant polymer Polymers 0.000 claims 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28114—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
- H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Ceramic Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 의한 방법에 사용되는 플라즈마 식각장치의 개략도.
제4A~4E도는 본 발명의 방법에 의해 식각된 패턴들의 단면도.
제 5도는 식각하는 동안 웨이퍼의 온도와 건식식각에 의해 얻을 수 있는 경사각의 상관도.
Claims (16)
- 물질을 선택적으로 식각하기 위한 방법에서, 식각된 물질의 영역은 노출시키도록 그 물질위에 식각마스크를 제공하는 단계와, 상기 물질과 접촉상태로 식각가스의 프라즈마를 제공하는 단계를 포함하며, 상기 식각가스는 상기 물질과 반웅하는 주반응 성분으로서 취화 수소, 취소 또는 그의 조합을 함유하며, 그에의해 상기 물질의 상기 노출영역이 선택적으로 식각되어 식각된 부분과 상기 식각마스크의 주변올 따라 측벽을 갖는 상기 물질이 형성되는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제1항에서, 상기 물질은 실리콘 또는 실리콘 함유 물질로 제조되는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제1항에서, 상기 식각은 상기 물질의 측벽이 90이하의 경사각을 갖도록 -40℃~+50℃의 온도에서 행해지는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제1항에서, 상기 식각은 상기 물질의 측벽이 90 또는 90부근의 경사각을 갖도록 50℃~150℃의 온도에서 행해지는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제1항에서, 상기 식각은 상기 물질의 측벽이 90 이상의 경사각을 갖도록 150℃ 이상의 온도에서 행해지는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제1항에서, 상기 식각가스는 반응 성분으로서 취화수소 또는 취소만을 함유하며 또한 불활성 가스를 더 함유하는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제3항에서, 상기 식각물질의 측벽의 상기 경사각은 다음식에 의해 조절되는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법 .식중 θ는 식각물질의 측벽의 경사각을 나타내는 것으로 ±5° 분산을 가짐 t는 식각하는 동안 물질의 온도.
- 물질을 선택적으로 식각하기 위한 벙법에서, 식각될 물질의 영역을 노출시키도록 그 물질위에 식각마스크를 제공하는 단계와 식각실내에서 상기 물질과 접촉상태로 식각가스의 프라즈마를 제공하는 단계를 포함하며, 상기 식각가스는 상기 물질과 반응하는 주반응성분으로서 취하 수소, 취소 또는 그의 조합을 함유하며 탄소함유 성분은 함유하지 않으며 그에의해 상기 물질의 상기 노출영역이 선택적으로 노출되며, 상기 식각실은 식각가스의 상기 프라즈마와 접촉상태의 탄소함유 물질을 갖고 있지 않는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제8항에서, 상기 식각가스는 상기 식각가스의 총중량을 기준으로 120rpm 이하의 탄소함량을 함유하는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제9항에서, 상기 식각가스는 상기 식각가스의 총중량을 기준으로 40rpm 이하의 탄소함량을 함유하는것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제9항에서, 상기 식각마스크는 무탄소 함유 물질로 구성되는 것이 특징인 취화수소 또는 취소로 건식식각하는 방법.
- 제8항에서, 상기 물질은 다결정실리콘으로 제조되며 또한 상기 식각마스크는 산화 또는 질화 실리콘으로 제조되는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 물질을 선택적으로 식각하기 위한 방법에서, 식각될 물질의 영역을 노출시키도록 물질위에 유기물질의 식각마스크룰 제공하는 단계와, 상기 물질과 접촉상태로 식각가스의 프라즈마를 제공하는 단계와, 상기 식각가스는 상기 물질과 반응하는 주반응성분으로서 취화 수소 함유하며 그에 의해 상기 물질의 상기 노출된 영역은 선택적으로 식각되며, 그리고 유기물질로 된 상기 식각마스크를 갖는 상기 물질 주위에 그의 플라즈마로 부터 분리된 여기 산소원자들을 함유하는 분위기를 제공하는 단계를 포함하는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제13항에서, 상기 프라즈마 식각단계후와, 상기 여기 산소원자 처리 전 또는 후에 산소의 프라즈마 내에 상기 식각마스크룰 재화하는 단계롤 더 포함하는 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제13항에서, 상기 유기물질의 식각마스크는 유기 포토레지스트인 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법.
- 제13항에서, 상기 식각될 물질은 다결정 실리콘인 것이 특징인 취화수소 또는 취소로 건식 식각하는 방법※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (12)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2665488 | 1988-02-09 | ||
JP63-026654 | 1988-02-09 | ||
JP88-26654 | 1988-02-09 | ||
JP88-178244 | 1988-07-19 | ||
JP17824488 | 1988-07-19 | ||
JP63-178244 | 1988-07-19 | ||
JP88-240940 | 1988-09-28 | ||
JP63-240940 | 1988-09-28 | ||
JP24094088A JPH0666302B2 (ja) | 1988-09-28 | 1988-09-28 | 半導体装置の製造方法 |
JP63-286880 | 1988-11-15 | ||
JP28688088 | 1988-11-15 | ||
JP88-286880 | 1988-11-15 |
Publications (2)
Publication Number | Publication Date |
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KR890013728A true KR890013728A (ko) | 1989-09-25 |
KR930001500B1 KR930001500B1 (ko) | 1993-03-02 |
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Application Number | Title | Priority Date | Filing Date |
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KR1019890001415A KR930001500B1 (ko) | 1988-02-09 | 1989-02-08 | 취화수소 또는 취소로 건식 식각하는 방법 |
Country Status (3)
Country | Link |
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EP (1) | EP0328350B1 (ko) |
KR (1) | KR930001500B1 (ko) |
DE (1) | DE68928977T2 (ko) |
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JP2890432B2 (ja) * | 1989-01-10 | 1999-05-17 | 富士通株式会社 | 有機物の灰化方法 |
JP2541851B2 (ja) * | 1989-03-10 | 1996-10-09 | 富士通株式会社 | 有機物の剥離方法 |
JPH03140477A (ja) * | 1989-10-16 | 1991-06-14 | Motorola Inc | 臭素を用いた多結晶シリコンのエッチング方法 |
EP0439101B1 (en) * | 1990-01-22 | 1997-05-21 | Sony Corporation | Dry etching method |
JPH0779102B2 (ja) * | 1990-08-23 | 1995-08-23 | 富士通株式会社 | 半導体装置の製造方法 |
US5560804A (en) * | 1991-03-19 | 1996-10-01 | Tokyo Electron Limited | Etching method for silicon containing layer |
JP2920848B2 (ja) * | 1991-03-19 | 1999-07-19 | 東京エレクトロン株式会社 | シリコン層のエッチング方法 |
JP3088178B2 (ja) * | 1991-04-22 | 2000-09-18 | 日本電気株式会社 | ポリシリコン膜のエッチング方法 |
US5756401A (en) * | 1992-03-23 | 1998-05-26 | Fujitsu Limited | Process for the etching of polycide film |
US5342801A (en) * | 1993-03-08 | 1994-08-30 | National Semiconductor Corporation | Controllable isotropic plasma etching technique for the suppression of stringers in memory cells |
EP0938134A3 (en) * | 1993-05-20 | 2000-01-19 | Hitachi, Ltd. | Plasma processing method |
EP0940846A1 (en) | 1998-03-06 | 1999-09-08 | Interuniversitair Micro-Elektronica Centrum Vzw | Method for stripping ion implanted photoresist layer |
FR2791177A1 (fr) * | 1999-03-19 | 2000-09-22 | France Telecom | Procede de realisation d'une grille en forme de champignon ou grille en "t" |
FR2811474B1 (fr) | 2000-07-07 | 2003-07-04 | Commissariat Energie Atomique | Procede de realisation d'une grille pour une structure de transistor cmos a canal de longueur reduite |
DE10114778A1 (de) | 2001-03-26 | 2002-10-17 | Infineon Technologies Ag | Verfahren zur Herstellung eines MOSFETs mit sehr kleiner Kanallänge |
FR2833752A1 (fr) * | 2002-05-28 | 2003-06-20 | Commissariat Energie Atomique | Procede de realisation de metallisations de section triangulaire en microelectronique |
JP6957252B2 (ja) * | 2017-07-20 | 2021-11-02 | 岩谷産業株式会社 | 切断加工方法 |
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US4419201A (en) * | 1981-08-24 | 1983-12-06 | Bell Telephone Laboratories, Incorporated | Apparatus and method for plasma-assisted etching of wafers |
US4490209B2 (en) * | 1983-12-27 | 2000-12-19 | Texas Instruments Inc | Plasma etching using hydrogen bromide addition |
JPH0644591B2 (ja) * | 1984-06-04 | 1994-06-08 | 株式会社日立マイコンシステム | 半導体装置の製造方法 |
JPS62111432A (ja) * | 1985-11-08 | 1987-05-22 | Fujitsu Ltd | 半導体装置の製造方法 |
JPS62271435A (ja) * | 1986-05-20 | 1987-11-25 | Fujitsu Ltd | レジストの剥離方法 |
JPH0793291B2 (ja) * | 1986-12-19 | 1995-10-09 | アプライド マテリアルズインコーポレーテッド | シリコンおよび珪化物のための臭素およびヨウ素エッチング方法 |
JPS63238288A (ja) * | 1987-03-27 | 1988-10-04 | Fujitsu Ltd | ドライエツチング方法 |
-
1989
- 1989-02-08 KR KR1019890001415A patent/KR930001500B1/ko not_active IP Right Cessation
- 1989-02-08 DE DE68928977T patent/DE68928977T2/de not_active Expired - Lifetime
- 1989-02-08 EP EP89301177A patent/EP0328350B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE68928977D1 (de) | 1999-06-02 |
EP0328350A2 (en) | 1989-08-16 |
EP0328350B1 (en) | 1999-04-28 |
DE68928977T2 (de) | 1999-08-19 |
EP0328350A3 (en) | 1990-07-18 |
KR930001500B1 (ko) | 1993-03-02 |
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