KR890008918A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

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Publication number
KR890008918A
KR890008918A KR1019880014379A KR880014379A KR890008918A KR 890008918 A KR890008918 A KR 890008918A KR 1019880014379 A KR1019880014379 A KR 1019880014379A KR 880014379 A KR880014379 A KR 880014379A KR 890008918 A KR890008918 A KR 890008918A
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KR
South Korea
Prior art keywords
trench
forming
insulating layer
isolation
semiconductor substrate
Prior art date
Application number
KR1019880014379A
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English (en)
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KR930002282B1 (en
Inventor
다께시 마쯔다니
가즈노리 이마오까
Original Assignee
야마모도 다꾸마
후지쓰 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 야마모도 다꾸마, 후지쓰 가부시끼가이샤 filed Critical 야마모도 다꾸마
Publication of KR890008918A publication Critical patent/KR890008918A/ko
Application granted granted Critical
Publication of KR930002282B1 publication Critical patent/KR930002282B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66181—Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors with potential-jump barrier or surface barrier
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945—Trench capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate

Abstract

내용 없음

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 4 도는 본 발명의 일예에 대한 평면도.
제 5 도 및 제 6 도는 각각 제 4 도의 AB 단면도 및 XY 단면도.

Claims (5)

  1. 반도체기판에 형성된 트렌치 커패시터, 상기 트렌치 커패시터를 분리하기 위해 사이에 제공된 트렌치, 및 상기 트렌치 커패시터를 분리하기 위해 상기 트렌치의 측벽에 형성되는 트렌치 커패시터로 구성된 것을 특징으로 하는 반도체 장치.
  2. 제1항에 있어서, 상기 반도체 기판을 실리콘으로 이루어진 것을 특징으로 하는 반도체 장치.
  3. 반도체 기판에 제1 아이솔레이션 트렌치를 형성하는 단계, 상기 제1 아이솔레이션 트렌치가 사이에 채워지도록 절연층을 형성하는 단계, 상기 제1절연층을 마스코로서 사용하여 상기 기판에 제2트렌치를 형성하는 단계, 및 상기 제1 아이솔레이션 트렌치에서 상기 절연층의 적어도 일부를 제거한 후에 상기 제1 및 상기 제2 아이솔레이션 트렌치에 커패시터 전극을 형성하는 단계로 구성되는 것을 특징으로 하는 반도체 장치 제조방법.
  4. 제3항에 있어서, 상기 불순물 도우프 영역은 P+형 실리콘 영역인 것을 특징으로 하는 반도체 장치 제조방법.
  5. 제3항에 있어서, 상기 절연층은 인규산염 유리층인 것을 특징으로 하는 반도체 장치 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR8814379A 1987-11-13 1988-11-02 Semiconductor device and manufacturing method thereof KR930002282B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP62285440A JPH01128559A (ja) 1987-11-13 1987-11-13 半導体装置及びその製造方法
JP?62-285440 1987-11-13

Publications (2)

Publication Number Publication Date
KR890008918A true KR890008918A (ko) 1989-07-13
KR930002282B1 KR930002282B1 (en) 1993-03-29

Family

ID=17691548

Family Applications (1)

Application Number Title Priority Date Filing Date
KR8814379A KR930002282B1 (en) 1987-11-13 1988-11-02 Semiconductor device and manufacturing method thereof

Country Status (5)

Country Link
US (1) US4918499A (ko)
EP (1) EP0317152B1 (ko)
JP (1) JPH01128559A (ko)
KR (1) KR930002282B1 (ko)
DE (1) DE3851504T2 (ko)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5143861A (en) * 1989-03-06 1992-09-01 Sgs-Thomson Microelectronics, Inc. Method making a dynamic random access memory cell with a tungsten plug
US5124766A (en) * 1989-06-30 1992-06-23 Texas Instruments Incorporated Filament channel transistor interconnected with a conductor
US6184105B1 (en) * 1997-05-22 2001-02-06 Advanced Micro Devices Method for post transistor isolation
US6476435B1 (en) * 1997-09-30 2002-11-05 Micron Technology, Inc. Self-aligned recessed container cell capacitor
US6755318B2 (en) * 2000-11-13 2004-06-29 Reliant Medicals Products, Inc. Limited flow cups
US7351634B2 (en) * 2006-05-25 2008-04-01 United Microelectronics Corp. Trench-capacitor DRAM device and manufacture method thereof

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0665225B2 (ja) * 1984-01-13 1994-08-22 株式会社東芝 半導体記憶装置の製造方法
JPH0665226B2 (ja) * 1984-03-01 1994-08-22 株式会社東芝 半導体記憶装置の製造方法
JP2604705B2 (ja) * 1985-04-03 1997-04-30 松下電子工業株式会社 Ｍｏｓキヤパシタの製造方法
JPS6233450A (ja) * 1985-08-06 1987-02-13 Nec Corp Ｍｉｓ型半導体記憶装置
JPS63257263A (ja) * 1987-04-14 1988-10-25 Mitsubishi Electric Corp 半導体記憶装置

Also Published As

Publication number Publication date
KR930002282B1 (en) 1993-03-29
EP0317152B1 (en) 1994-09-14
US4918499A (en) 1990-04-17
JPH01128559A (ja) 1989-05-22
EP0317152A2 (en) 1989-05-24
DE3851504D1 (de) 1994-10-20
EP0317152A3 (en) 1990-09-12
DE3851504T2 (de) 1995-01-12

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