KR950012686A - 반도체장치 및 그 제조방법 - Google Patents

반도체장치 및 그 제조방법 Download PDF

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Publication number
KR950012686A
KR950012686A KR1019940025645A KR19940025645A KR950012686A KR 950012686 A KR950012686 A KR 950012686A KR 1019940025645 A KR1019940025645 A KR 1019940025645A KR 19940025645 A KR19940025645 A KR 19940025645A KR 950012686 A KR950012686 A KR 950012686A
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KR
South Korea
Prior art keywords
epitaxial layer
trench
semiconductor substrate
layer
semiconductor device
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Application number
KR1019940025645A
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English (en)
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KR0169278B1 (ko
Inventor
가즈나리 이시마루
Original Assignee
사토 후미오
가부시키가이샤 도시바
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Publication of KR950012686A publication Critical patent/KR950012686A/ko
Application granted granted Critical
Publication of KR0169278B1 publication Critical patent/KR0169278B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642—Isolation within the component, i.e. internal isolation
    • H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H01L21/743—Making of internal connections, substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior

Abstract

본 발명은, 소자분리를 위한 공정을 복잡화하는 것을 방지한다.
본 발명은, 반도체기판(1)상에 순차적으로 형성된 매립콜렉터층(2) 및 에피택셜층(4)과, 에피택셜층내에 형성된 거의 같은 깊이의 소자분리용 도랑 및, 도랑에 매립된 절연물로 이루어지는 소자분리영역 (11,11a) 을 구비하고 있는 것을 특징으로 한다.

Description

반도체장치 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 반도체장치의 제1실시예의 구성을 도시한 단면도,
제2도는 제1도에 도시한 반도체장치의 제조공정을 도시한 단면도,
제3도는 제1도에 도시한 반도체장치의 제조공정을 도시한 단면도.

Claims (2)

  1. 반도체기판(1)상에 순차적으로 형성된 매립콜렉터층(2) 및 에피택셜층(4)과, 이 에피택셜층(4)내에 형성된 거의 같은 깊이의 소자분리용 도랑 및, 이 도랑에 매립된 절연물로 이루어진 소자분리영역 (11, 11a)을 구비하여 이루어진 것을 특징으로 하는 반도체장치.
  2. 반도체기판(2)상에 매립콜렉터층(2) 및 에피택셜층(4)을 형성하는 공정과, 이 에피택셜층(4)내에 거의같은 깊이의 소자분리용 도량을 형성하는 공정 및 이 도랑에 절연물을 매립하는 공정을 구비하여 이루어진 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940025645A 1993-10-07 1994-10-07 반도체장치 및 그 제조방법 KR0169278B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP93-251843 1993-10-07
JP5251843A JPH07106412A (ja) 1993-10-07 1993-10-07 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
KR950012686A true KR950012686A (ko) 1995-05-16
KR0169278B1 KR0169278B1 (ko) 1999-02-01

Family

ID=17228752

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940025645A KR0169278B1 (ko) 1993-10-07 1994-10-07 반도체장치 및 그 제조방법

Country Status (4)

Country Link
US (1) US5731623A (ko)
EP (1) EP0647968A3 (ko)
JP (1) JPH07106412A (ko)
KR (1) KR0169278B1 (ko)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19629766C2 (de) 1996-07-23 2002-06-27 Infineon Technologies Ag Herstellverfahren von Shallow-Trench-Isolationsbereiche in einem Substrat
DE69738012T2 (de) * 1996-11-26 2007-12-13 Matsushita Electric Industrial Co., Ltd., Kadoma Halbleitervorrichtung und deren Herstellungsverfahren
JP3075204B2 (ja) * 1997-02-28 2000-08-14 日本電気株式会社 半導体装置の製造方法
US5912501A (en) * 1997-07-18 1999-06-15 Advanced Micro Devices, Inc. Elimination of radius of curvature effects of p-n junction avalanche breakdown using slots
US5969402A (en) * 1997-07-18 1999-10-19 Advanced Micro Devices, Inc. Reduction of depletion spreading sideways utilizing slots
SE0103036D0 (sv) * 2001-05-04 2001-09-13 Ericsson Telefon Ab L M Semiconductor process and integrated circuit
FR2829288A1 (fr) * 2001-09-06 2003-03-07 St Microelectronics Sa Structure de contact sur une region profonde formee dans un substrat semiconducteur
GB0507157D0 (en) * 2005-04-08 2005-05-18 Ami Semiconductor Belgium Bvba Double trench for isolation of semiconductor devices
US7737526B2 (en) * 2007-03-28 2010-06-15 Advanced Analogic Technologies, Inc. Isolated trench MOSFET in epi-less semiconductor sustrate
US7749859B2 (en) * 2007-06-29 2010-07-06 Infineon Technologies Ag Semiconductor devices and methods of manufacture thereof

Family Cites Families (13)

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Publication number Priority date Publication date Assignee Title
US3928091A (en) * 1971-09-27 1975-12-23 Hitachi Ltd Method for manufacturing a semiconductor device utilizing selective oxidation
JPS5226182A (en) * 1975-08-25 1977-02-26 Hitachi Ltd Manufacturing method of semi-conductor unit
JPS5577172A (en) * 1978-12-06 1980-06-10 Oki Electric Ind Co Ltd Semiconductor device
DE3583575D1 (de) * 1984-10-17 1991-08-29 Hitachi Ltd Komplementaere halbleiteranordnung.
JPS61220465A (ja) * 1985-03-27 1986-09-30 Toshiba Corp 半導体装置
JPS62245649A (ja) * 1986-04-18 1987-10-26 Toshiba Corp 半導体装置及びその製造方法
US4897362A (en) * 1987-09-02 1990-01-30 Harris Corporation Double epitaxial method of fabricating semiconductor devices on bonded wafers
JPS6489365A (en) * 1987-09-29 1989-04-03 Nec Corp Semiconductor device
JP2590236B2 (ja) * 1987-10-07 1997-03-12 株式会社日立製作所 半導体装置
US4929996A (en) * 1988-06-29 1990-05-29 Texas Instruments Incorporated Trench bipolar transistor
US5241211A (en) * 1989-12-20 1993-08-31 Nec Corporation Semiconductor device
JP3204752B2 (ja) * 1992-09-16 2001-09-04 株式会社東芝 半導体装置
US5644157A (en) * 1992-12-25 1997-07-01 Nippondenso Co., Ltd. High withstand voltage type semiconductor device having an isolation region

Also Published As

Publication number Publication date
EP0647968A3 (en) 1998-01-07
US5731623A (en) 1998-03-24
JPH07106412A (ja) 1995-04-21
EP0647968A2 (en) 1995-04-12
KR0169278B1 (ko) 1999-02-01

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