KR870006646A - 합성수지에 의한 전자부품의 캡슐화방법 - Google Patents

합성수지에 의한 전자부품의 캡슐화방법 Download PDF

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KR870006646A
KR870006646A KR860010932A KR860010932A KR870006646A KR 870006646 A KR870006646 A KR 870006646A KR 860010932 A KR860010932 A KR 860010932A KR 860010932 A KR860010932 A KR 860010932A KR 870006646 A KR870006646 A KR 870006646A
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resin
synthetic resin
coating
electronic component
mold
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KR860010932A
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브와니 실비에
니예보에르 쇼외르트
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이반 밀러 레르너
엔 브이 필립스 글로아이람펜파브리켄
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Publication of KR870006646A publication Critical patent/KR870006646A/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
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    • H01ELECTRIC ELEMENTS
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    • H01L23/00Details of semiconductor or other solid state devices
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    • H01ELECTRIC ELEMENTS
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135Double encapsulation or coating and encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

내용 없음.

Description

합성수지에 의한 전자부품의 캡슐화방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 방법에 의하여 캡슐화가 제공된 전자반도체부품의 단면도.
제2도는 본 발명에 따른 방법에 의하여 반사공동과 함께 제공된 발광다이오드를 예비피복시키는 공정의 도시도.
제3A도 및 제3B도는 본 발명에 따른 방법에 사용가능한, 최종 피복공정전의 준비공정의 도시도.
* 도면의 주요부분에 대한 부호의 설명
11 : 절연지지체 121,3 : 도체금속트랙
14 : 와이어 15 : 전자부품
16 : 에폭시비스페놀A디메타크리레이트수지 18 : 불투명필름
21,22 : 금속도체 24 : 반도체크리스탈
25 : 반사공동 26 : 수지
27 : 니들 33 : 수지
34 : 작동장치 35 : 필름
37 : 라인 41 : 금속도체
43 : 반도체크리스탈 46 : 공동
47 : 수지 51 : 중합
63 : 크리스탈 70 : 주형

Claims (6)

  1. 고정되어 작동장치를 금속도체에 전기적으로 접속된 후에, 합성수지에 의하여 적어도 하나의 피복수단이 수행되고, 상기 도체는 이러한 피복으로부터 부분이 침지되는, 전자부품을 캡슐화시키는 방법에 있어서, 원합성수지로서 에폭시비스페놀A 디메타크리레이트족이 사용되고, 이것에 광분쇄 혹은 0.2 및 3중량퍼센트 사이의 농도로서 수소 분자간 추출에 의하여 래디칼을 형성하는 광개시제합성하는 광개시제 합성물을 첨가하고, 또한 그후 상기 수지가 상기 수지가 상기 피복의 중합화를 이루도록 자외선으로 조사시키는 것을 특징으로 하는 합성수지로의 전자부품의 캡슐화방법.
  2. 상기 작동장치에 직접 가해지는 예비피복공정 및 예비 피복체적이 이 속에 포함되는 상기 캡슐화의 외부를 형성하는 최종 피복공정을 포함하는, 제1항에 따른 방법에 있어서, 상기 예비피복 공정에 대해서 상기 최종피복 공정으로 진행되기 전에 자외선방사로 조사되는 최종 피복에 대해 사용되는 것과 동일한 특성을 가진 원수지가 사용되는 것을 특징으로 하는 합성수지로의 전자부품의 캡슐화방법.
  3. 상기 주형이, 적어도 어떤 특수한 이것 외형의 부분에서 제어되고 재형성 가능한 형태를 갖는 캡슐의 외부를 얻도록 상기 주형이 사용되는 제1항에 따른 방법에 있어서, 자외선에 투명한 벽을 가진 주형이 사용되고, 각각의 적합한 위치에 고정된 후에 상기 장치가 이것의 도체들과 함께 제공되며 또한 상기 주형은 적당량의 수지와 함께 제공되는데, 상기 수지는 캡슐의 외부형태상에서 중화를 시작하도록 선택된 방향내에서 상기 주형 전체에 자외선이 조사되고, 상기 형태는 최선의 충실도를 갖도록 고려되고, 상기 상태는 연속적인 중합의 전면이 상기 선택적인 방향으로의 병진운동에 의하여 상기 수지 내에 치환되도록 유지되는 것을 특징으로 하는 합성수지로의 전자부품의 캡슐화방법.
  4. 제3항에 있어서, 상기 캡슐형태의 외부와는 별도로 상기 형태가 고려되고 또한 이것과 반대로 과도한 수지체적은 상기 중합화된 상태에서 캡슐화에 의하여 재현된 상기 체적에 대해서 제공되며, 또한 이러한 과도한 체적은 상기 수지의 과도한 체적의 연속적인 감소에 대한 중합화의 수축에 기인되어 응축되도록 중합화공정동안 제거되는 것과 무관하도록 유지되는 것을 특징으로 하는 합성수지로의 전자부품의 캡슐화방법.
  5. 제1항 내지 제4항중 어느 한항에 있어서, 상기 최종 피복공정전에 동일한 성질의 광중합 가능한 수지의 비교적 얇은 필름이 상기 최종 피복에 의하여 덮여질 도체의 부분 및 상기 장치에 가해지며, 또한 상기 필름은 최종 피복으로 진행되기 전에 완전하게 중합화될때까지 자외선으로 조사되는 것을 특징으로 하는 합성수지로의 전자부품의 캡슐화방법.
  6. 광전자 반도체장치를 피복시키기 위한 제1항 내지 제5항중 어느 한항에 청구된 상기 방법의 적용.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR860010932A 1985-12-20 1986-12-19 합성수지에 의한 전자부품의 캡슐화방법 KR870006646A (ko)

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Application Number Priority Date Filing Date Title
FR8518922 1985-12-20
FR8518922A FR2592221B1 (fr) 1985-12-20 1985-12-20 Procede d'encapsulation d'un composant electronique au moyen d'une resine synthetique

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US (1) US4822536A (ko)
EP (1) EP0230078B1 (ko)
JP (1) JPS62156826A (ko)
KR (1) KR870006646A (ko)
DE (1) DE3678699D1 (ko)
FR (1) FR2592221B1 (ko)

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DE3678699D1 (de) 1991-05-16
JPS62156826A (ja) 1987-07-11
US4822536A (en) 1989-04-18
FR2592221A1 (fr) 1987-06-26
FR2592221B1 (fr) 1988-02-12
EP0230078B1 (fr) 1991-04-10
EP0230078A1 (fr) 1987-07-29

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