KR850005131A - 에피택셜 성장 기술에 의한 메사 트랜지스터의 제작방법 - Google Patents

에피택셜 성장 기술에 의한 메사 트랜지스터의 제작방법 Download PDF

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Publication number
KR850005131A
KR850005131A KR1019830005887A KR830005887A KR850005131A KR 850005131 A KR850005131 A KR 850005131A KR 1019830005887 A KR1019830005887 A KR 1019830005887A KR 830005887 A KR830005887 A KR 830005887A KR 850005131 A KR850005131 A KR 850005131A
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KR
South Korea
Prior art keywords
epitaxial growth
mesa transistor
growth technology
manufacturing
transistor
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KR1019830005887A
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English (en)
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KR850001439B1 (ko
Inventor
김도식
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강진구
삼성반도체통신 주식회사
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Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019830005887A priority Critical patent/KR850001439B1/ko
Publication of KR850005131A publication Critical patent/KR850005131A/ko
Application granted granted Critical
Publication of KR850001439B1 publication Critical patent/KR850001439B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0804Emitter regions of bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0821Collector regions of bipolar transistors

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Weting (AREA)

Abstract

내용 없음

Description

에피택셜 성장기술에 의한 메사트랜지스터의 제작방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1(a)도~제1(i)도는 종래의 메사트랜지스터의 제작공정도.
제2(a)도~제2(h)도는 본 발명에 따른 메사트랜지스터의 제작공정도.

Claims (1)

  1. 메사 트랜지스터의 제작방법에 있어서, 소자형성 부분만 선택 에피택셜 성장을 시켜 베이스층(14)으로 하고 에미터(17)를 확산시켜 웨트 에칭방법을 제거함을 특징으로 하는 에피택셜 성장 기술에 의한 메사트랜지스터의 제작방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019830005887A 1983-12-08 1983-12-08 에피택셜 성장기술에 의한 메사트랜지스터의 제작방법 KR850001439B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019830005887A KR850001439B1 (ko) 1983-12-08 1983-12-08 에피택셜 성장기술에 의한 메사트랜지스터의 제작방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019830005887A KR850001439B1 (ko) 1983-12-08 1983-12-08 에피택셜 성장기술에 의한 메사트랜지스터의 제작방법

Publications (2)

Publication Number Publication Date
KR850005131A true KR850005131A (ko) 1985-08-21
KR850001439B1 KR850001439B1 (ko) 1985-10-02

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019830005887A KR850001439B1 (ko) 1983-12-08 1983-12-08 에피택셜 성장기술에 의한 메사트랜지스터의 제작방법

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KR (1) KR850001439B1 (ko)

Also Published As

Publication number Publication date
KR850001439B1 (ko) 1985-10-02

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