KR20180095609A - 웨이퍼 평탄도의 개선 방법 및 이 방법으로부터 만들어지는 본딩된 웨이퍼 어셈블리 - Google Patents

웨이퍼 평탄도의 개선 방법 및 이 방법으로부터 만들어지는 본딩된 웨이퍼 어셈블리 Download PDF

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KR20180095609A
KR20180095609A KR1020187020189A KR20187020189A KR20180095609A KR 20180095609 A KR20180095609 A KR 20180095609A KR 1020187020189 A KR1020187020189 A KR 1020187020189A KR 20187020189 A KR20187020189 A KR 20187020189A KR 20180095609 A KR20180095609 A KR 20180095609A
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semiconductor wafer
layer
warp
bow
strain
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그레고리 바티니카
카메슈와르 야다발리
첸 팬
벤자민 에이. 하스켈
허쎄인 에스. 엘-고루리
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오스텐도 테크놀로지스 인코포레이티드
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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Manufacturing & Machinery (AREA)
  • Recrystallisation Techniques (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Physical Vapour Deposition (AREA)
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KR1020187020189A 2015-12-16 2016-12-16 웨이퍼 평탄도의 개선 방법 및 이 방법으로부터 만들어지는 본딩된 웨이퍼 어셈블리 Ceased KR20180095609A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201562268262P 2015-12-16 2015-12-16
US62/268,262 2015-12-16
US15/379,759 2016-12-15
US15/379,759 US9978582B2 (en) 2015-12-16 2016-12-15 Methods for improving wafer planarity and bonded wafer assemblies made from the methods
PCT/US2016/067379 WO2017106788A1 (en) 2015-12-16 2016-12-16 Methods for improving wafer planarity and bonded wafer assemblies made from the methods

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US (1) US9978582B2 (enExample)
JP (2) JP6952697B2 (enExample)
KR (1) KR20180095609A (enExample)
CN (1) CN108604572A (enExample)
TW (1) TWI765874B (enExample)
WO (1) WO2017106788A1 (enExample)

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WO2020068254A1 (en) * 2018-09-25 2020-04-02 Applied Materials, Inc. Methods and apparatus to eliminate wafer bow for cvd and patterning hvm systems
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JP7259527B2 (ja) * 2019-04-26 2023-04-18 富士電機株式会社 半導体基板の製造方法および半導体装置の製造方法
US10790296B1 (en) * 2019-05-21 2020-09-29 Sandisk Technologies Llc Distortion-compensated wafer bonding method and apparatus using a temperature-controlled backside thermal expansion layer
KR102767982B1 (ko) * 2019-10-15 2025-02-14 에스케이하이닉스 주식회사 웨이퍼 지지 구조체
CN111048429B (zh) * 2019-12-23 2022-05-27 武汉新芯集成电路制造有限公司 一种晶圆键合方法
FR3121548B1 (fr) * 2021-03-30 2024-02-16 Soitec Silicon On Insulator Procede de preparation d’un substrat avance, notamment pour des applications photoniques
CN116368952A (zh) 2021-06-30 2023-06-30 长江存储科技有限责任公司 三维存储器装置及其形成方法
WO2023272627A1 (en) 2021-06-30 2023-01-05 Yangtze Memory Technologies Co., Ltd. Three-dimensional memory devices and methods for forming the same
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CN115803882A (zh) 2021-06-30 2023-03-14 长江存储科技有限责任公司 三维存储器装置及其形成方法
CN116018889A (zh) 2021-06-30 2023-04-25 长江存储科技有限责任公司 三维存储器装置及其形成方法
WO2023272634A1 (en) 2021-06-30 2023-01-05 Yangtze Memory Technologies Co., Ltd. Three-dimensional memory devices
CN113906542A (zh) * 2021-08-30 2022-01-07 长江存储科技有限责任公司 使用背面膜层沉积和激光退火的晶圆应力控制
CN115036204A (zh) * 2022-05-07 2022-09-09 上海华力集成电路制造有限公司 通过降低晶圆翘曲度提高bsi工艺稳定性的方法
TW202431354A (zh) * 2022-09-28 2024-08-01 美商應用材料股份有限公司 應力管理期間全域曲率的校正
US20240266230A1 (en) * 2023-02-08 2024-08-08 Applied Materials, Inc. Optimized film deposition and ion implantation for mitigation of stress and deformation in substrates
CN117373908A (zh) * 2023-10-09 2024-01-09 物元半导体技术(青岛)有限公司 调整晶圆翘曲度的方法、光刻方法及半导体结构
US12435964B2 (en) 2023-11-16 2025-10-07 Tokyo Electron Limited Contactless capacitive measurement tool with improved throughput and accuracy
CN118263137B (zh) * 2024-05-29 2025-07-25 浙江创芯集成电路有限公司 半导体结构的形成方法
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US9978582B2 (en) 2018-05-22
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