KR20180023831A - 반도체 장치의 제조 방법 - Google Patents
반도체 장치의 제조 방법 Download PDFInfo
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- KR20180023831A KR20180023831A KR1020170105955A KR20170105955A KR20180023831A KR 20180023831 A KR20180023831 A KR 20180023831A KR 1020170105955 A KR1020170105955 A KR 1020170105955A KR 20170105955 A KR20170105955 A KR 20170105955A KR 20180023831 A KR20180023831 A KR 20180023831A
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- Prior art keywords
- gate electrode
- film
- insulating film
- region
- semiconductor substrate
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H01L27/11568—
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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| JP2020155485A (ja) * | 2019-03-18 | 2020-09-24 | キオクシア株式会社 | 半導体装置およびその製造方法 |
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|---|---|---|---|---|
| JPS61218135A (ja) * | 1985-03-23 | 1986-09-27 | Oki Electric Ind Co Ltd | シリコン酸化膜の形成方法 |
| US5069747A (en) * | 1990-12-21 | 1991-12-03 | Micron Technology, Inc. | Creation and removal of temporary silicon dioxide structures on an in-process integrated circuit with minimal effect on exposed, permanent silicon dioxide structures |
| JPH06349817A (ja) * | 1993-06-14 | 1994-12-22 | Kawasaki Steel Corp | 半導体装置の製造方法 |
| JP2962250B2 (ja) * | 1996-11-12 | 1999-10-12 | 日本電気株式会社 | 半導体記憶装置の製造方法 |
| KR100363839B1 (ko) | 1999-12-24 | 2002-12-06 | 주식회사 하이닉스반도체 | 반도체 소자의 층간 절연막 형성 방법 |
| JP2002151664A (ja) * | 2000-11-13 | 2002-05-24 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
| US7141483B2 (en) * | 2002-09-19 | 2006-11-28 | Applied Materials, Inc. | Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill |
| JP2006041107A (ja) * | 2004-07-26 | 2006-02-09 | Seiko Epson Corp | 半導体装置及びその製造方法 |
| TWI311796B (en) * | 2005-11-17 | 2009-07-01 | Ememory Technology Inc | Semiconductor device and manufacturing method thereof |
| JP4487266B2 (ja) * | 2006-08-30 | 2010-06-23 | エルピーダメモリ株式会社 | 半導体装置 |
| JP2010182751A (ja) * | 2009-02-03 | 2010-08-19 | Renesas Electronics Corp | 不揮発性半導体記憶装置及びその製造方法 |
| JP6026914B2 (ja) * | 2013-02-12 | 2016-11-16 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| JP6297430B2 (ja) * | 2014-06-30 | 2018-03-20 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
-
2016
- 2016-08-25 JP JP2016164586A patent/JP6713878B2/ja active Active
-
2017
- 2017-05-23 US US15/602,448 patent/US10186518B2/en active Active
- 2017-07-26 CN CN201710614700.3A patent/CN107785377B/zh active Active
- 2017-08-15 TW TW106127516A patent/TW201820590A/zh unknown
- 2017-08-22 KR KR1020170105955A patent/KR20180023831A/ko not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| CN107785377B (zh) | 2023-06-16 |
| CN107785377A (zh) | 2018-03-09 |
| TW201820590A (zh) | 2018-06-01 |
| US10186518B2 (en) | 2019-01-22 |
| US20180061849A1 (en) | 2018-03-01 |
| JP6713878B2 (ja) | 2020-06-24 |
| JP2018032760A (ja) | 2018-03-01 |
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