KR20150006358A - 반도체장치 - Google Patents
반도체장치 Download PDFInfo
- Publication number
- KR20150006358A KR20150006358A KR20140082372A KR20140082372A KR20150006358A KR 20150006358 A KR20150006358 A KR 20150006358A KR 20140082372 A KR20140082372 A KR 20140082372A KR 20140082372 A KR20140082372 A KR 20140082372A KR 20150006358 A KR20150006358 A KR 20150006358A
- Authority
- KR
- South Korea
- Prior art keywords
- pad
- conductive tape
- semiconductor chip
- conductive adhesive
- electrically conductive
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 239000000853 adhesive Substances 0.000 claims abstract description 19
- 230000001070 adhesive effect Effects 0.000 claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims description 3
- 239000011347 resin Substances 0.000 description 9
- 229920005989 resin Polymers 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 230000001413 cellular effect Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
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- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
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- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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Abstract
제품의 품질 및 생산성을 향상시킬 수 있는 반도체장치를 얻는다. 기판(1) 위에 패드 2, 3이 인접해서 설치되어 있다. 도전성 테이프(6)가 패드 2, 3에 부착되어 있다. 도전성 테이프(6)는 패드 2의 내측에 관통공(7)을 갖는다. 도전성 접착제(8)가 관통공(7) 내부에 도포되어 있다. 도전성 접착제(8)는 도전성 테이프(6)보다도 높은 열전도율을 갖는다. 반도체 칩(9)이 도전성 접착제(8)에 의해 패드 2 위에 실장되어 있다. 전자부품(10)이 도전성 테이프(6)에 의해 패드 3 위에 실장되어 있다.
Description
본 발명은, 제품의 품질 및 생산성을 향상시킬 수 있는 반도체장치에 관한 것이다.
광 모듈이나 휴대전화용 파워앰프에 있어서, 전기 특성의 향상과 소형화를 위해, 반도체 칩이나 콘덴서 부품을 좁은 간격으로 고밀도로 실장하는 협인접 실장(close-adjacency mounting)이 필요하게 되기 시작하고 있다. 현재의 실장방법에서는, Ag 페이스트 수지를 다이패드 위에 전사나 디스펜싱에 의해 도포하고, 그 Ag 페이스트 수지 위에 부품을 자동 다이본드 장치에 의해 싣는다. 또한, 부품을 도전성 테이프에 의해 실장하는 방법도 제안되어 있다(예를 들면, 특허문헌 1의 단락 0013-0014 및 도 3 참조).
Ag 페이스트 수지에 의한 실장의 경우, 칩 끝과 부품 끝에서 Ag 페이스트 수지가 튀어나온다. 특히 협인접 실장에서는 양자로부터 튀어나온 Ag 페이스트 수지가 좁은 틈에서 중첩되어 수지량이 많아진다. 이 때문에, Ag 페이스트 수지가 반도체와 전자부품의 윗면으로 기어올라가, 윗면 전극과 밑면측의 배선이 쇼트한다. 또한, 대전류를 흘려 발열량이 큰 액티브 부품을 도전성 테이프 위에 실장한 경우, 방열성과 전류용량이 부족하여 부품이 고장날 가능성이 있다. 이 때문에, 제품의 품질 및 생산성이 저하한다고 하는 문제가 있었다.
본 발명은, 전술한 것과 같은 과제를 해결하기 위해 이루어진 것으로서, 그 목적은 제품의 품질 및 생산성을 향상시킬 수 있는 반도체장치를 얻는 것이다.
본 발명에 관한 반도체장치는, 기판과, 기판 위에 인접해서 설치된 제1 및 제2 패드와, 상기 제1 및 제2 패드에 부착되고, 상기 제1 패드의 내측에 관통공을 갖는 도전성 테이프와, 상기 관통공 내부에 도포되고, 상기 도전성 테이프보다도 높은 열전도율을 갖는 도전성 접착제와, 상기 도전성 접착제에 의해 상기 제1 패드 위에 실장된 반도체 칩과, 상기 도전성 테이프에 의해 상기 제2 패드 위에 실장된 전자부품을 구비한 것을 특징으로 한다.
본 발명에 의해, 제품의 품질 및 생산성을 향상시킬 수 있다.
도 1은 본 발명의 실시형태에 관한 반도체장치를 나타낸 사시도다.
도 2는 본 발명의 실시형태에 관한 반도체장치의 내부를 나타낸 평면도다.
도 3은 본 발명의 실시형태에 관한 반도체장치의 주요부를 나타낸 단면도다.
도 4는 비교예에 관한 반도체장치를 나타낸 단면도다.
도 5는 비교예에 관한 반도체장치를 나타낸 단면도다.
도 2는 본 발명의 실시형태에 관한 반도체장치의 내부를 나타낸 평면도다.
도 3은 본 발명의 실시형태에 관한 반도체장치의 주요부를 나타낸 단면도다.
도 4는 비교예에 관한 반도체장치를 나타낸 단면도다.
도 5는 비교예에 관한 반도체장치를 나타낸 단면도다.
도 1은, 본 발명의 실시형태에 관한 반도체장치를 나타낸 사시도다. 단, 도 1에서는 일부를 절결하여 장치 내부를 나타내고 있다. 도 2는, 본 발명의 실시형태에 관한 반도체장치의 내부를 나타낸 평면도다. 도 3은, 본 발명의 실시형태에 관한 반도체장치의 주요부를 나타낸 단면도다.
기판(1)은 세라믹재 또는 유기재이다. 기판(1)의 윗면에 패드 2, 3, 4 및 배선(5)을 갖는 전기회로가 설치되어 있다. 패드 2, 3은 인접해서 배치되고, 배선(5)을 거쳐 접속되어 있다. 납땜성과 와이어 본드성을 향상시키기 위해, 패드 2, 3, 4의 최표층에는 표면처리로서 Au 도금이 실시되어 있다.
도전성 테이프(6)가 패드 2, 3에 부착되어 있다. 도전성 테이프(6)는, 열을 가함으로써 경화해서 접합 강도를 유지하는 다이본드 필름 등이다. 도전성 테이프(6)는 패드 2의 내측에 관통공(7)을 갖는다. 도전성 접착제(8)가 관통공(7) 내부에 도포되어 있다. 도전성 접착제(8)는 Ag 페이스트 수지(Ag 에폭시 수지, Ag 폴리이미드 수지) 또는 땜납 등이며, 도전성 테이프(6)보다도 높은 열전도율을 갖는다.
반도체 칩(9)이 도전성 테이프(6)와 도전성 접착제(8)에 의해 패드 2 위에 실장되어 있다. 전자부품(10)이 도전성 테이프(6)에 의해 패드 3 위에 실장되어 있다. 반도체 칩(9)은 대전류를 흘려 발열량이 큰 액티브 부품이다. 전자부품(10)은 콘덴서, 인덕터, 스위치 등이다.
반도체 칩(9)의 밑면에 하면 전극(11)이 설치되고, 반도체 칩(9)의 윗면에 상면 전극(12, 13)이 설치되어 있다. 하면 전극(11)은 도전성 접착제(8)를 개재하여 패드 2에 접속되어 있다. 관통공(7)의 사이즈는 반도체 칩(9)의 외형 사이즈보다 약간 작다. 도전성 테이프(6)에는 두께가 존재하기 때문에, 도전성 접착제(8)는 도전성 테이프(6)의 관통공(7) 내부에 있어서 하면 전극(11)과 패드 2 사이에 머무른다.
반도체 칩(9)의 상면 전극 12가 금속 와이어 14를 거쳐 패드 4에 접속되고, 상면 전극 13이 금속 와이어 15를 거쳐 전자부품(10)에 접속되어 있다. 반도체 칩(9), 전자부품(10), 및 금속 와이어 14, 15는 수지(16)에 의해 봉지되어 있다.
이어서, 본 실시형태의 효과를 비교예와 비교해서 설명한다. 도 4 및 도 5는 비교예에 관한 반도체장치를 나타낸 단면도다. 비교예에서는 반도체 칩(9)과 전자부품(10)의 실장에 도전성 접착제(8) 만을 사용한다. 이 때문에, 도 4에 나타낸 것과 같이 반도체 칩(9)과 전자부품(10)의 간격을 가깝게 하면, 부품으로부터 튀어나온 도전성 접착제(8)가 반도체 칩(9)과 전자부품(10)의 윗면에 기어올라, 상면 전극 13과 밑면측의 패드 2 등이 쇼트한다. 따라서, 도 5에 나타낸 것과 같이 반도체 칩(9)과 전자부품(10)의 간격을 넓히지 않으면 안된다.
한편, 본 실시형태에서는, 도전성 테이프(6)의 관통공(7)에 도포한 도전성 접착제(8)를 사용해서 반도체 칩(9)을 실장한다. 반도체 칩(9)이 덮개로서 기능하기 때문에, 도전성 접착제(8)가 관통공(7)으로부터 새어서 퍼지는 것을 방지할 수 있다. 따라서, 반도체 칩(9)과 전자부품(10)의 간격을 가깝게 할 수 있다. 이 결과, 제품을 소형화할 수 있고, 부품 사이를 접속하는 금속 와이어 15의 길이가 짧아짐으로써 전기 특성이 향상된다. 또한, 반도체 칩(9)의 실장에 높은 열전도율을 갖는 도전성 접착제(8)를 사용한다. 이에 따라, 방열성과 전류용량을 확보할 수 있다. 이 결과, 제품의 품질 및 생산성을 향상시킬 수 있다. 이때, 액티브 부품이 아닌 전자부품(10)은 도전성 테이프(6)에 의해 실장해도 문제는 생기지 않는다.
1 기판, 2 패드(제1 패드), 3 패드(제2 패드), 6 도전성 테이프, 7 관통공, 8 도전성 접착제, 9 반도체 칩, 10 전자부품, 11 하면 전극, 13 상면 전극, 15 금속 와이어
Claims (2)
- 기판과,
기판 위에 인접해서 설치된 제1 및 제2 패드와,
상기 제1 및 제2 패드에 부착되고, 상기 제1 패드의 내측에 관통공을 갖는 도전성 테이프와,
상기 관통공 내부에 도포되고, 상기 도전성 테이프보다도 높은 열전도율을 갖는 도전성 접착제와,
상기 도전성 접착제에 의해 상기 제1 패드 위에 실장된 반도체 칩과,
상기 도전성 테이프에 의해 상기 제2 패드 위에 실장된 전자부품을 구비한 것을 특징으로 하는 반도체장치.
- 제 1항에 있어서,
상기 반도체 칩은, 칩 밑면에 설치된 하면 전극과, 칩 윗면에 설치된 상면 전극을 갖고,
상기 하면 전극은 상기 도전성 접착제를 개재하여 상기 제1 패드에 접속되고,
상기 상면 전극은 와이어를 거쳐 상기 전자부품에 접속되어 있는 것을 특징으로 하는 반도체장치.
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JPS6334194A (ja) | 1986-07-30 | 1988-02-13 | 日立マクセル株式会社 | Icカ−ド用基板 |
US5072283A (en) * | 1988-04-12 | 1991-12-10 | Bolger Justin C | Pre-formed chip carrier cavity package |
JPH0531226U (ja) | 1991-09-30 | 1993-04-23 | 東北日本電気株式会社 | ダイボンデイングペーストはみ出し防止枠付き混成集積回路基板 |
JPH0621244U (ja) * | 1992-08-18 | 1994-03-18 | シャープ株式会社 | 電力半導体装置 |
JP2825084B2 (ja) * | 1996-08-29 | 1998-11-18 | 日本電気株式会社 | 半導体装置およびその製造方法 |
JP3013786B2 (ja) | 1996-09-11 | 2000-02-28 | 日本電気株式会社 | 半導体装置の製造方法 |
JPH10335567A (ja) * | 1997-05-30 | 1998-12-18 | Mitsubishi Electric Corp | 半導体集積回路装置 |
JP3661444B2 (ja) * | 1998-10-28 | 2005-06-15 | 株式会社ルネサステクノロジ | 半導体装置、半導体ウエハ、半導体モジュールおよび半導体装置の製造方法 |
US6441476B1 (en) * | 2000-10-18 | 2002-08-27 | Seiko Epson Corporation | Flexible tape carrier with external terminals formed on interposers |
JP2001298147A (ja) | 2000-04-18 | 2001-10-26 | Kawasaki Steel Corp | 半導体装置及びその製造方法 |
JP2002076589A (ja) | 2000-08-31 | 2002-03-15 | Hitachi Ltd | 電子装置及びその製造方法 |
JP2004103919A (ja) | 2002-09-11 | 2004-04-02 | Renesas Technology Corp | 半導体ウェーハ及びその製造方法並びに半導体装置 |
JP2004140170A (ja) * | 2002-10-17 | 2004-05-13 | Hitachi Chem Co Ltd | 接着用熱伝導性フィルム及びそれを用いた半導体装置 |
JP2004335970A (ja) | 2003-05-12 | 2004-11-25 | Sony Corp | 複合電子部品 |
JP5149881B2 (ja) | 2009-09-30 | 2013-02-20 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
CN202549824U (zh) * | 2012-02-22 | 2012-11-21 | 苏州晶方半导体科技股份有限公司 | 芯片封装结构 |
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CN104282651A (zh) | 2015-01-14 |
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