KR20110128897A - 하부에 감소된 지름을 갖는 금속 필러들을 포함하는 반도체 디바이스의 금속화 시스템 - Google Patents

하부에 감소된 지름을 갖는 금속 필러들을 포함하는 반도체 디바이스의 금속화 시스템 Download PDF

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Publication number
KR20110128897A
KR20110128897A KR1020117022596A KR20117022596A KR20110128897A KR 20110128897 A KR20110128897 A KR 20110128897A KR 1020117022596 A KR1020117022596 A KR 1020117022596A KR 20117022596 A KR20117022596 A KR 20117022596A KR 20110128897 A KR20110128897 A KR 20110128897A
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South Korea
Prior art keywords
passivation layer
metal
opening
forming
final passivation
Prior art date
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Application number
KR1020117022596A
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English (en)
Korean (ko)
Inventor
프랭크 페우스텔
카이 프로흐버그
토마스 베르네르
Original Assignee
어드밴스드 마이크로 디바이시즈, 인코포레이티드
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Publication of KR20110128897A publication Critical patent/KR20110128897A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
    • H10W72/01233—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01235—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01257—Changing the shapes of bumps by reflowing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231—Shapes
    • H10W72/234—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H10W72/9232—Bond pads having multiple stacked layers with additional elements interposed between layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
KR1020117022596A 2009-02-27 2010-02-22 하부에 감소된 지름을 갖는 금속 필러들을 포함하는 반도체 디바이스의 금속화 시스템 Withdrawn KR20110128897A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102009010885.8A DE102009010885B4 (de) 2009-02-27 2009-02-27 Metallisierungssystem eines Halbleiterbauelements mit Metallsäulen mit einem kleineren Durchmesser an der Unterseite und Herstellungsverfahren dafür
DE102009010885.8 2009-02-27

Publications (1)

Publication Number Publication Date
KR20110128897A true KR20110128897A (ko) 2011-11-30

Family

ID=42102254

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020117022596A Withdrawn KR20110128897A (ko) 2009-02-27 2010-02-22 하부에 감소된 지름을 갖는 금속 필러들을 포함하는 반도체 디바이스의 금속화 시스템

Country Status (6)

Country Link
US (1) US9245860B2 (https=)
JP (1) JP2012519374A (https=)
KR (1) KR20110128897A (https=)
CN (1) CN102428551A (https=)
DE (1) DE102009010885B4 (https=)
WO (1) WO2010097191A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9768142B2 (en) 2013-07-17 2017-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming bonding structures

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Publication number Priority date Publication date Assignee Title
US8344504B2 (en) 2010-07-29 2013-01-01 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Semiconductor structure comprising pillar and moisture barrier
US8314472B2 (en) 2010-07-29 2012-11-20 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Semiconductor structure comprising pillar
US20120273937A1 (en) * 2011-04-30 2012-11-01 Stats Chippac, Ltd. Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer
US8536707B2 (en) 2011-11-29 2013-09-17 Avago Technologies General Ip (Singapore) Pte. Ltd. Semiconductor structure comprising moisture barrier and conductive redistribution layer
US10049893B2 (en) * 2016-05-11 2018-08-14 Advanced Semiconductor Engineering, Inc. Semiconductor device with a conductive post
US10636758B2 (en) 2017-10-05 2020-04-28 Texas Instruments Incorporated Expanded head pillar for bump bonds
KR102940785B1 (ko) 2020-03-26 2026-03-20 삼성전자주식회사 반도체 패키지
US20240088072A1 (en) * 2022-09-13 2024-03-14 Micron Technology, Inc. Embedded metal pads

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US5137597A (en) * 1991-04-11 1992-08-11 Microelectronics And Computer Technology Corporation Fabrication of metal pillars in an electronic component using polishing
JPH0555228A (ja) * 1991-08-27 1993-03-05 Nec Corp 半導体装置
JPH05206139A (ja) * 1991-11-19 1993-08-13 Nec Corp 基板接続電極およびその製造方法
JP2773578B2 (ja) * 1992-10-02 1998-07-09 日本電気株式会社 半導体装置の製造方法
US5656858A (en) * 1994-10-19 1997-08-12 Nippondenso Co., Ltd. Semiconductor device with bump structure
US5912510A (en) * 1996-05-29 1999-06-15 Motorola, Inc. Bonding structure for an electronic device
US5773897A (en) * 1997-02-21 1998-06-30 Raytheon Company Flip chip monolithic microwave integrated circuit with mushroom-shaped, solder-capped, plated metal bumps
US5891756A (en) * 1997-06-27 1999-04-06 Delco Electronics Corporation Process for converting a wire bond pad to a flip chip solder bump pad and pad formed thereby
JP3420703B2 (ja) * 1998-07-16 2003-06-30 株式会社東芝 半導体装置の製造方法
US6103552A (en) * 1998-08-10 2000-08-15 Lin; Mou-Shiung Wafer scale packaging scheme
JP4131595B2 (ja) * 1999-02-05 2008-08-13 三洋電機株式会社 半導体装置の製造方法
JP2002076046A (ja) * 2000-09-04 2002-03-15 Citizen Watch Co Ltd 半導体装置の製造方法
US6818545B2 (en) * 2001-03-05 2004-11-16 Megic Corporation Low fabrication cost, fine pitch and high reliability solder bump
TWI244129B (en) * 2002-10-25 2005-11-21 Via Tech Inc Bonding column process
JP4119866B2 (ja) * 2004-05-12 2008-07-16 富士通株式会社 半導体装置
TWI242253B (en) * 2004-10-22 2005-10-21 Advanced Semiconductor Eng Bumping process and structure thereof
JP2006295109A (ja) * 2005-03-14 2006-10-26 Citizen Watch Co Ltd 半導体装置とその製造方法
KR100857365B1 (ko) * 2007-02-28 2008-09-05 주식회사 네패스 반도체 장치의 범프 구조물
US8709934B2 (en) * 2007-06-05 2014-04-29 Stats Chippac Ltd. Electronic system with vertical intermetallic compound

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9768142B2 (en) 2013-07-17 2017-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming bonding structures
US10504870B2 (en) 2013-07-17 2019-12-10 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for forming bonding structures
US11233032B2 (en) 2013-07-17 2022-01-25 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for forming bonding structures

Also Published As

Publication number Publication date
DE102009010885B4 (de) 2014-12-31
DE102009010885A1 (de) 2010-09-02
US20100219527A1 (en) 2010-09-02
WO2010097191A1 (en) 2010-09-02
JP2012519374A (ja) 2012-08-23
CN102428551A (zh) 2012-04-25
US9245860B2 (en) 2016-01-26

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