KR20110049896A - BiCMOS 프로세스에서 베이스 형성 방법 - Google Patents
BiCMOS 프로세스에서 베이스 형성 방법 Download PDFInfo
- Publication number
- KR20110049896A KR20110049896A KR1020117007280A KR20117007280A KR20110049896A KR 20110049896 A KR20110049896 A KR 20110049896A KR 1020117007280 A KR1020117007280 A KR 1020117007280A KR 20117007280 A KR20117007280 A KR 20117007280A KR 20110049896 A KR20110049896 A KR 20110049896A
- Authority
- KR
- South Korea
- Prior art keywords
- emitter
- spacer
- base
- semiconductor structure
- adjacent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/133—Emitter regions of BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/01—Manufacture or treatment
- H10D10/051—Manufacture or treatment of vertical BJTs
- H10D10/054—Forming extrinsic base regions on silicon substrate after insulating device isolation in vertical BJTs having single crystalline emitter, collector or base regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/177—Base regions of bipolar transistors, e.g. BJTs or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
- H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
- H10D84/401—Combinations of FETs or IGBTs with BJTs
Landscapes
- Bipolar Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/709,113 US6911681B1 (en) | 2004-04-14 | 2004-04-14 | Method of base formation in a BiCMOS process |
| US10/709,113 | 2004-04-14 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020067019999A Division KR20070003976A (ko) | 2004-04-14 | 2005-04-06 | BiCMOS 프로세스에서 베이스 형성 방법 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR20110049896A true KR20110049896A (ko) | 2011-05-12 |
Family
ID=34677064
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020117007280A Ceased KR20110049896A (ko) | 2004-04-14 | 2005-04-06 | BiCMOS 프로세스에서 베이스 형성 방법 |
| KR1020067019999A Abandoned KR20070003976A (ko) | 2004-04-14 | 2005-04-06 | BiCMOS 프로세스에서 베이스 형성 방법 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020067019999A Abandoned KR20070003976A (ko) | 2004-04-14 | 2005-04-06 | BiCMOS 프로세스에서 베이스 형성 방법 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US6911681B1 (https=) |
| EP (1) | EP1754253A4 (https=) |
| JP (1) | JP5182797B2 (https=) |
| KR (2) | KR20110049896A (https=) |
| CN (1) | CN101076896B (https=) |
| TW (1) | TWI343605B (https=) |
| WO (1) | WO2005104680A2 (https=) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6911681B1 (en) | 2004-04-14 | 2005-06-28 | International Business Machines Corporation | Method of base formation in a BiCMOS process |
| US7709338B2 (en) * | 2006-12-21 | 2010-05-04 | International Business Machines Corporation | BiCMOS devices with a self-aligned emitter and methods of fabricating such BiCMOS devices |
| DE102008010323A1 (de) * | 2008-02-21 | 2009-09-10 | Texas Instruments Deutschland Gmbh | Verfahren zur Herstellung einer elektronischen Vorrichtung, die einen bipolaren PNP-Transistor umfasst |
| US20090250785A1 (en) * | 2008-04-02 | 2009-10-08 | Thomas Joseph Krutsick | Methods of forming a shallow base region of a bipolar transistor |
| US8853796B2 (en) * | 2011-05-19 | 2014-10-07 | GLOBALFOUNDIERS Singapore Pte. Ltd. | High-K metal gate device |
| US20120313146A1 (en) | 2011-06-08 | 2012-12-13 | International Business Machines Corporation | Transistor and method of forming the transistor so as to have reduced base resistance |
| US8546230B2 (en) | 2011-11-15 | 2013-10-01 | International Business Machines Corporation | Bipolar transistor with a collector having a protected outer edge portion for reduced based-collector junction capacitance and a method of forming the transistor |
| US8603883B2 (en) | 2011-11-16 | 2013-12-10 | International Business Machines Corporation | Interface control in a bipolar junction transistor |
| US20130277804A1 (en) * | 2012-04-20 | 2013-10-24 | International Business Machines Corporation | Bipolar junction transistors with reduced base-collector junction capacitance |
| US9887278B2 (en) | 2015-09-28 | 2018-02-06 | International Business Machines Corporation | Semiconductor-on-insulator lateral heterojunction bipolar transistor having epitaxially grown intrinsic base and deposited extrinsic base |
| US11508354B2 (en) * | 2020-05-04 | 2022-11-22 | Rovi Guides, Inc. | Method and apparatus for correcting failures in automated speech recognition systems |
| US11855196B2 (en) * | 2021-10-25 | 2023-12-26 | Globalfoundries Singapore Pte. Ltd. | Transistor with wrap-around extrinsic base |
Family Cites Families (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4682409A (en) * | 1985-06-21 | 1987-07-28 | Advanced Micro Devices, Inc. | Fast bipolar transistor for integrated circuit structure and method for forming same |
| US4808548A (en) | 1985-09-18 | 1989-02-28 | Advanced Micro Devices, Inc. | Method of making bipolar and MOS devices on same integrated circuit substrate |
| DE3886062T2 (de) * | 1987-01-30 | 1994-05-19 | Texas Instruments Inc | Verfahren zum Herstellen integrierter Strukturen aus bipolaren und CMOS-Transistoren. |
| US5144403A (en) | 1989-02-07 | 1992-09-01 | Hewlett-Packard Company | Bipolar transistor with trench-isolated emitter |
| JP2746289B2 (ja) * | 1989-09-09 | 1998-05-06 | 忠弘 大見 | 素子の作製方法並びに半導体素子およびその作製方法 |
| US5017990A (en) | 1989-12-01 | 1991-05-21 | International Business Machines Corporation | Raised base bipolar transistor structure and its method of fabrication |
| US5107321A (en) | 1990-04-02 | 1992-04-21 | National Semiconductor Corporation | Interconnect method for semiconductor devices |
| EP0452720A3 (en) | 1990-04-02 | 1994-10-26 | Nat Semiconductor Corp | A semiconductor structure and method of its manufacture |
| US5106767A (en) | 1990-12-07 | 1992-04-21 | International Business Machines Corporation | Process for fabricating low capacitance bipolar junction transistor |
| JP3152959B2 (ja) * | 1991-07-12 | 2001-04-03 | 富士通株式会社 | 半導体装置及びその製造方法 |
| JPH05182980A (ja) * | 1992-01-07 | 1993-07-23 | Toshiba Corp | ヘテロ接合バイポーラトランジスタ |
| JPH05275437A (ja) * | 1992-03-24 | 1993-10-22 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| JP2630237B2 (ja) | 1993-12-22 | 1997-07-16 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| US5455189A (en) | 1994-02-28 | 1995-10-03 | National Semiconductor Corporation | Method of forming BICMOS structures |
| US5439833A (en) | 1994-03-15 | 1995-08-08 | National Semiconductor Corp. | Method of making truly complementary and self-aligned bipolar and CMOS transistor structures with minimized base and gate resistances and parasitic capacitance |
| JPH07335773A (ja) | 1994-06-10 | 1995-12-22 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
| EP0709894B1 (en) | 1994-10-28 | 2001-08-08 | Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno | High-frequency bipolar transistor structure, and related manufacturing process |
| US5541121A (en) | 1995-01-30 | 1996-07-30 | Texas Instruments Incorporated | Reduced resistance base contact method for single polysilicon bipolar transistors using extrinsic base diffusion from a diffusion source dielectric layer |
| EP0766295A1 (en) | 1995-09-29 | 1997-04-02 | Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno | Process for forming a high frequency bipolar transistor structure comprising an oblique implantation step |
| KR100205024B1 (ko) * | 1995-12-20 | 1999-07-01 | 양승택 | 초 자기 정렬 바이폴러 트랜지스터의 제조방법 |
| FR2756104B1 (fr) | 1996-11-19 | 1999-01-29 | Sgs Thomson Microelectronics | Fabrication de circuits integres bipolaires/cmos |
| JP3456864B2 (ja) * | 1997-05-20 | 2003-10-14 | 株式会社東芝 | 半導体装置及びその製造方法 |
| JP3366919B2 (ja) * | 1997-06-27 | 2003-01-14 | エヌイーシー化合物デバイス株式会社 | 半導体装置 |
| WO1999052138A1 (en) | 1998-04-08 | 1999-10-14 | Aeroflex Utmc Microelectronic Systems Inc. | A bipolar transistor having low extrinsic base resistance |
| FR2779573B1 (fr) | 1998-06-05 | 2001-10-26 | St Microelectronics Sa | Transistor bipolaire vertical comportant une base extrinseque de rugosite reduite, et procede de fabrication |
| JP2001035858A (ja) * | 1999-07-21 | 2001-02-09 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2001085441A (ja) * | 1999-09-13 | 2001-03-30 | Oki Electric Ind Co Ltd | バイポーラトランジスタ |
| FR2804247B1 (fr) | 2000-01-21 | 2002-04-12 | St Microelectronics Sa | Procede de realisation d'un transistor bipolaire a emetteur et base extrinseque auto-alignes |
| FR2805923B1 (fr) * | 2000-03-06 | 2002-05-24 | St Microelectronics Sa | Procede de fabrication d'un transistor bipolaire double- polysilicium auto-aligne |
| JP2001319936A (ja) * | 2000-05-12 | 2001-11-16 | Matsushita Electric Ind Co Ltd | バイポーラトランジスタ及びその製造方法 |
| JP2002334889A (ja) * | 2001-05-10 | 2002-11-22 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
| US6492238B1 (en) | 2001-06-22 | 2002-12-10 | International Business Machines Corporation | Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit |
| US6911681B1 (en) | 2004-04-14 | 2005-06-28 | International Business Machines Corporation | Method of base formation in a BiCMOS process |
-
2004
- 2004-04-14 US US10/709,113 patent/US6911681B1/en not_active Expired - Lifetime
-
2005
- 2005-04-04 TW TW094110758A patent/TWI343605B/zh not_active IP Right Cessation
- 2005-04-06 US US10/599,938 patent/US7625792B2/en not_active Expired - Lifetime
- 2005-04-06 WO PCT/US2005/011711 patent/WO2005104680A2/en not_active Ceased
- 2005-04-06 KR KR1020117007280A patent/KR20110049896A/ko not_active Ceased
- 2005-04-06 JP JP2007508392A patent/JP5182797B2/ja not_active Expired - Fee Related
- 2005-04-06 CN CN2005800112256A patent/CN101076896B/zh not_active Expired - Fee Related
- 2005-04-06 KR KR1020067019999A patent/KR20070003976A/ko not_active Abandoned
- 2005-04-06 EP EP05736453A patent/EP1754253A4/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| CN101076896B (zh) | 2011-07-13 |
| EP1754253A4 (en) | 2008-10-22 |
| WO2005104680A3 (en) | 2007-07-05 |
| KR20070003976A (ko) | 2007-01-05 |
| US6911681B1 (en) | 2005-06-28 |
| JP5182797B2 (ja) | 2013-04-17 |
| EP1754253A2 (en) | 2007-02-21 |
| CN101076896A (zh) | 2007-11-21 |
| TW200534401A (en) | 2005-10-16 |
| US7625792B2 (en) | 2009-12-01 |
| US20070207567A1 (en) | 2007-09-06 |
| TWI343605B (en) | 2011-06-11 |
| WO2005104680A2 (en) | 2005-11-10 |
| JP2007536724A (ja) | 2007-12-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A107 | Divisional application of patent | ||
| A201 | Request for examination | ||
| PA0104 | Divisional application for international application |
Comment text: Divisional Application for International Patent Patent event code: PA01041R01D Patent event date: 20110329 |
|
| PA0201 | Request for examination | ||
| PG1501 | Laying open of application | ||
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20110624 Patent event code: PE09021S01D |
|
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
Patent event date: 20120330 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 20110624 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |