JP5182797B2 - トランジスタおよびバイポーラ相補型金属酸化膜半導体デバイスを製造する方法 - Google Patents

トランジスタおよびバイポーラ相補型金属酸化膜半導体デバイスを製造する方法 Download PDF

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Publication number
JP5182797B2
JP5182797B2 JP2007508392A JP2007508392A JP5182797B2 JP 5182797 B2 JP5182797 B2 JP 5182797B2 JP 2007508392 A JP2007508392 A JP 2007508392A JP 2007508392 A JP2007508392 A JP 2007508392A JP 5182797 B2 JP5182797 B2 JP 5182797B2
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forming
extrinsic base
base
emitter
insulator
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Expired - Fee Related
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JP2007508392A
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Japanese (ja)
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JP2007536724A5 (https=
JP2007536724A (ja
Inventor
ガイス、ピーター、ジェイ
ジョセフ、アルビン、ジェイ
リュー、チー
オーナー、ブラドリー、エー
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International Business Machines Corp
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International Business Machines Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133—Emitter regions of BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H10D10/054—Forming extrinsic base regions on silicon substrate after insulating device isolation in vertical BJTs having single crystalline emitter, collector or base regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/177—Base regions of bipolar transistors, e.g. BJTs or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0107—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109—Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401—Combinations of FETs or IGBTs with BJTs

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  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Integrated Circuits (AREA)
JP2007508392A 2004-04-14 2005-04-06 トランジスタおよびバイポーラ相補型金属酸化膜半導体デバイスを製造する方法 Expired - Fee Related JP5182797B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/709,113 US6911681B1 (en) 2004-04-14 2004-04-14 Method of base formation in a BiCMOS process
US10/709,113 2004-04-14
PCT/US2005/011711 WO2005104680A2 (en) 2004-04-14 2005-04-06 A method of base formation in a bicmos process

Publications (3)

Publication Number Publication Date
JP2007536724A JP2007536724A (ja) 2007-12-13
JP2007536724A5 JP2007536724A5 (https=) 2008-05-15
JP5182797B2 true JP5182797B2 (ja) 2013-04-17

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007508392A Expired - Fee Related JP5182797B2 (ja) 2004-04-14 2005-04-06 トランジスタおよびバイポーラ相補型金属酸化膜半導体デバイスを製造する方法

Country Status (7)

Country Link
US (2) US6911681B1 (https=)
EP (1) EP1754253A4 (https=)
JP (1) JP5182797B2 (https=)
KR (2) KR20110049896A (https=)
CN (1) CN101076896B (https=)
TW (1) TWI343605B (https=)
WO (1) WO2005104680A2 (https=)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
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US6911681B1 (en) 2004-04-14 2005-06-28 International Business Machines Corporation Method of base formation in a BiCMOS process
US7709338B2 (en) * 2006-12-21 2010-05-04 International Business Machines Corporation BiCMOS devices with a self-aligned emitter and methods of fabricating such BiCMOS devices
DE102008010323A1 (de) * 2008-02-21 2009-09-10 Texas Instruments Deutschland Gmbh Verfahren zur Herstellung einer elektronischen Vorrichtung, die einen bipolaren PNP-Transistor umfasst
US20090250785A1 (en) * 2008-04-02 2009-10-08 Thomas Joseph Krutsick Methods of forming a shallow base region of a bipolar transistor
US8853796B2 (en) * 2011-05-19 2014-10-07 GLOBALFOUNDIERS Singapore Pte. Ltd. High-K metal gate device
US20120313146A1 (en) 2011-06-08 2012-12-13 International Business Machines Corporation Transistor and method of forming the transistor so as to have reduced base resistance
US8546230B2 (en) 2011-11-15 2013-10-01 International Business Machines Corporation Bipolar transistor with a collector having a protected outer edge portion for reduced based-collector junction capacitance and a method of forming the transistor
US8603883B2 (en) 2011-11-16 2013-12-10 International Business Machines Corporation Interface control in a bipolar junction transistor
US20130277804A1 (en) * 2012-04-20 2013-10-24 International Business Machines Corporation Bipolar junction transistors with reduced base-collector junction capacitance
US9887278B2 (en) 2015-09-28 2018-02-06 International Business Machines Corporation Semiconductor-on-insulator lateral heterojunction bipolar transistor having epitaxially grown intrinsic base and deposited extrinsic base
US11508354B2 (en) * 2020-05-04 2022-11-22 Rovi Guides, Inc. Method and apparatus for correcting failures in automated speech recognition systems
US11855196B2 (en) * 2021-10-25 2023-12-26 Globalfoundries Singapore Pte. Ltd. Transistor with wrap-around extrinsic base

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US4808548A (en) 1985-09-18 1989-02-28 Advanced Micro Devices, Inc. Method of making bipolar and MOS devices on same integrated circuit substrate
DE3886062T2 (de) * 1987-01-30 1994-05-19 Texas Instruments Inc Verfahren zum Herstellen integrierter Strukturen aus bipolaren und CMOS-Transistoren.
US5144403A (en) 1989-02-07 1992-09-01 Hewlett-Packard Company Bipolar transistor with trench-isolated emitter
JP2746289B2 (ja) * 1989-09-09 1998-05-06 忠弘 大見 素子の作製方法並びに半導体素子およびその作製方法
US5017990A (en) 1989-12-01 1991-05-21 International Business Machines Corporation Raised base bipolar transistor structure and its method of fabrication
US5107321A (en) 1990-04-02 1992-04-21 National Semiconductor Corporation Interconnect method for semiconductor devices
EP0452720A3 (en) 1990-04-02 1994-10-26 Nat Semiconductor Corp A semiconductor structure and method of its manufacture
US5106767A (en) 1990-12-07 1992-04-21 International Business Machines Corporation Process for fabricating low capacitance bipolar junction transistor
JP3152959B2 (ja) * 1991-07-12 2001-04-03 富士通株式会社 半導体装置及びその製造方法
JPH05182980A (ja) * 1992-01-07 1993-07-23 Toshiba Corp ヘテロ接合バイポーラトランジスタ
JPH05275437A (ja) * 1992-03-24 1993-10-22 Fujitsu Ltd 半導体装置及びその製造方法
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US5455189A (en) 1994-02-28 1995-10-03 National Semiconductor Corporation Method of forming BICMOS structures
US5439833A (en) 1994-03-15 1995-08-08 National Semiconductor Corp. Method of making truly complementary and self-aligned bipolar and CMOS transistor structures with minimized base and gate resistances and parasitic capacitance
JPH07335773A (ja) 1994-06-10 1995-12-22 Hitachi Ltd 半導体集積回路装置の製造方法
EP0709894B1 (en) 1994-10-28 2001-08-08 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno High-frequency bipolar transistor structure, and related manufacturing process
US5541121A (en) 1995-01-30 1996-07-30 Texas Instruments Incorporated Reduced resistance base contact method for single polysilicon bipolar transistors using extrinsic base diffusion from a diffusion source dielectric layer
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JP2001319936A (ja) * 2000-05-12 2001-11-16 Matsushita Electric Ind Co Ltd バイポーラトランジスタ及びその製造方法
JP2002334889A (ja) * 2001-05-10 2002-11-22 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US6492238B1 (en) 2001-06-22 2002-12-10 International Business Machines Corporation Bipolar transistor with raised extrinsic base fabricated in an integrated BiCMOS circuit
US6911681B1 (en) 2004-04-14 2005-06-28 International Business Machines Corporation Method of base formation in a BiCMOS process

Also Published As

Publication number Publication date
CN101076896B (zh) 2011-07-13
EP1754253A4 (en) 2008-10-22
WO2005104680A3 (en) 2007-07-05
KR20070003976A (ko) 2007-01-05
US6911681B1 (en) 2005-06-28
EP1754253A2 (en) 2007-02-21
CN101076896A (zh) 2007-11-21
TW200534401A (en) 2005-10-16
US7625792B2 (en) 2009-12-01
US20070207567A1 (en) 2007-09-06
TWI343605B (en) 2011-06-11
WO2005104680A2 (en) 2005-11-10
KR20110049896A (ko) 2011-05-12
JP2007536724A (ja) 2007-12-13

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