KR20090045123A - Ｓｏｉ 기판의 제조방법 및 반도체장치의 제조방법 - Google Patents

Ｓｏｉ 기판의 제조방법 및 반도체장치의 제조방법 Download PDF

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Publication number
KR20090045123A
KR20090045123A KR1020080107887A KR20080107887A KR20090045123A KR 20090045123 A KR20090045123 A KR 20090045123A KR 1020080107887 A KR1020080107887 A KR 1020080107887A KR 20080107887 A KR20080107887 A KR 20080107887A KR 20090045123 A KR20090045123 A KR 20090045123A
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South Korea
Prior art keywords
layer
single crystal
substrate
crystal semiconductor
semiconductor layer
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KR1020080107887A
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English (en)
Korean (ko)
Inventor
아키히사 시모무라
준페이 모모
Original Assignee
가부시키가이샤 한도오따이 에네루기 켄큐쇼
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Publication of KR20090045123A publication Critical patent/KR20090045123A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3808—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H10P14/3816—Pulsed laser beam

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  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Electroluminescent Light Sources (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR1020080107887A 2007-11-01 2008-10-31 Ｓｏｉ 기판의 제조방법 및 반도체장치의 제조방법 Withdrawn KR20090045123A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007285180 2007-11-01
JPJP-P-2007-285180 2007-11-01

Publications (1)

Publication Number Publication Date
KR20090045123A true KR20090045123A (ko) 2009-05-07

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020080107887A Withdrawn KR20090045123A (ko) 2007-11-01 2008-10-31 Ｓｏｉ 기판의 제조방법 및 반도체장치의 제조방법

Country Status (5)

Country Link
US (1) US20090117707A1 (enExample)
JP (1) JP2009135448A (enExample)
KR (1) KR20090045123A (enExample)
CN (1) CN101425456A (enExample)
TW (1) TW200943478A (enExample)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200105971A (ko) * 2009-12-04 2020-09-09 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
US11728349B2 (en) 2009-12-04 2023-08-15 Semiconductor Energy Laboratory Co., Ltd. Display device and electronic device including the same

Also Published As

Publication number Publication date
CN101425456A (zh) 2009-05-06
JP2009135448A (ja) 2009-06-18
TW200943478A (en) 2009-10-16
US20090117707A1 (en) 2009-05-07

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PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20081031

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid