KR20060051496A - 반도체 장치 및 그 제조방법 - Google Patents

반도체 장치 및 그 제조방법 Download PDF

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Publication number
KR20060051496A
KR20060051496A KR1020050087804A KR20050087804A KR20060051496A KR 20060051496 A KR20060051496 A KR 20060051496A KR 1020050087804 A KR1020050087804 A KR 1020050087804A KR 20050087804 A KR20050087804 A KR 20050087804A KR 20060051496 A KR20060051496 A KR 20060051496A
Authority
KR
South Korea
Prior art keywords
etching stopper
film
etching
stopper film
conductive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020050087804A
Other languages
English (en)
Korean (ko)
Inventor
가츠히로 우에스기
가츠오 가타야마
가츠히사 사카이
Original Assignee
가부시끼가이샤 르네사스 테크놀로지
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시끼가이샤 르네사스 테크놀로지 filed Critical 가부시끼가이샤 르네사스 테크놀로지
Publication of KR20060051496A publication Critical patent/KR20060051496A/ko
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
KR1020050087804A 2004-09-22 2005-09-21 반도체 장치 및 그 제조방법 Withdrawn KR20060051496A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004275565A JP2006093330A (ja) 2004-09-22 2004-09-22 半導体装置およびその製造方法
JPJP-P-2004-00275565 2004-09-22

Publications (1)

Publication Number Publication Date
KR20060051496A true KR20060051496A (ko) 2006-05-19

Family

ID=36074618

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020050087804A Withdrawn KR20060051496A (ko) 2004-09-22 2005-09-21 반도체 장치 및 그 제조방법

Country Status (5)

Country Link
US (3) US7301237B2 (https=)
JP (1) JP2006093330A (https=)
KR (1) KR20060051496A (https=)
CN (2) CN100499068C (https=)
TW (1) TW200618177A (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070293034A1 (en) * 2006-06-15 2007-12-20 Macronix International Co., Ltd. Unlanded via process without plasma damage
US9391020B2 (en) * 2014-03-31 2016-07-12 Stmicroelectronics, Inc. Interconnect structure having large self-aligned vias

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2953188B2 (ja) 1992-04-24 1999-09-27 日本電気株式会社 半導体装置の製造方法
JP3297220B2 (ja) * 1993-10-29 2002-07-02 株式会社東芝 半導体装置の製造方法および半導体装置
JPH097970A (ja) 1995-06-21 1997-01-10 Sanyo Electric Co Ltd 半導体装置の製造方法
TW337608B (en) * 1997-10-29 1998-08-01 United Microelectronics Corp Process for producing unlanded via
JP2000294631A (ja) 1999-04-05 2000-10-20 Mitsubishi Electric Corp 半導体装置及びその製造方法
KR100303366B1 (ko) * 1999-06-29 2001-11-01 박종섭 반도체 소자의 배선 형성방법
CN1224092C (zh) * 2000-04-28 2005-10-19 东京毅力科创株式会社 具有低介电膜的半导体器件及其制造方法
JP2002009152A (ja) * 2000-06-21 2002-01-11 Nec Corp 半導体装置及びその製造方法
US20030148618A1 (en) * 2002-02-07 2003-08-07 Applied Materials, Inc. Selective metal passivated copper interconnect with zero etch stops

Also Published As

Publication number Publication date
JP2006093330A (ja) 2006-04-06
US20080045006A1 (en) 2008-02-21
US7301237B2 (en) 2007-11-27
CN101546748A (zh) 2009-09-30
US20090137114A1 (en) 2009-05-28
CN1758425A (zh) 2006-04-12
CN100499068C (zh) 2009-06-10
TW200618177A (en) 2006-06-01
US7465662B2 (en) 2008-12-16
US20060063372A1 (en) 2006-03-23

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PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

PC1203 Withdrawal of no request for examination

St.27 status event code: N-1-6-B10-B12-nap-PC1203

WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid
P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000