KR20050106457A - 국부적인 웨이퍼 온도 제어에 의한 웨이퍼 상의 임계 치수변동 보상 - Google Patents
국부적인 웨이퍼 온도 제어에 의한 웨이퍼 상의 임계 치수변동 보상 Download PDFInfo
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- 238000000034 method Methods 0.000 claims abstract description 53
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- 238000010438 heat treatment Methods 0.000 claims abstract description 41
- 230000008569 process Effects 0.000 claims abstract description 41
- 239000000463 material Substances 0.000 claims abstract description 11
- 238000012360 testing method Methods 0.000 claims abstract description 9
- 235000012431 wafers Nutrition 0.000 claims description 128
- 238000005259 measurement Methods 0.000 claims description 23
- 239000012530 fluid Substances 0.000 claims description 6
- 230000001276 controlling effect Effects 0.000 claims 1
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- 230000003595 spectral effect Effects 0.000 claims 1
- 230000001419 dependent effect Effects 0.000 abstract description 4
- 238000001459 lithography Methods 0.000 abstract description 4
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- 239000004065 semiconductor Substances 0.000 description 8
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- 150000002500 ions Chemical class 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- 238000012937 correction Methods 0.000 description 4
- 239000013307 optical fiber Substances 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
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- 238000003079 width control Methods 0.000 description 2
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- 238000003384 imaging method Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F27—FURNACES; KILNS; OVENS; RETORTS
- F27D—DETAILS OR ACCESSORIES OF FURNACES, KILNS, OVENS, OR RETORTS, IN SO FAR AS THEY ARE OF KINDS OCCURRING IN MORE THAN ONE KIND OF FURNACE
- F27D99/00—Subject matter not provided for in other groups of this subclass
- F27D99/0001—Heating elements or systems
- F27D99/0006—Electric heating elements or system
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F27—FURNACES; KILNS; OVENS; RETORTS
- F27B—FURNACES, KILNS, OVENS, OR RETORTS IN GENERAL; OPEN SINTERING OR LIKE APPARATUS
- F27B17/00—Furnaces of a kind not covered by any preceding group
- F27B17/0016—Chamber type furnaces
- F27B17/0025—Especially adapted for treating semiconductor wafers
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F27—FURNACES; KILNS; OVENS; RETORTS
- F27B—FURNACES, KILNS, OVENS, OR RETORTS IN GENERAL; OPEN SINTERING OR LIKE APPARATUS
- F27B5/00—Muffle furnaces; Retort furnaces; Other furnaces in which the charge is held completely isolated
- F27B5/06—Details, accessories, or equipment peculiar to furnaces of these types
- F27B5/14—Arrangements of heating devices
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F27—FURNACES; KILNS; OVENS; RETORTS
- F27D—DETAILS OR ACCESSORIES OF FURNACES, KILNS, OVENS, OR RETORTS, IN SO FAR AS THEY ARE OF KINDS OCCURRING IN MORE THAN ONE KIND OF FURNACE
- F27D19/00—Arrangements of controlling devices
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F27—FURNACES; KILNS; OVENS; RETORTS
- F27D—DETAILS OR ACCESSORIES OF FURNACES, KILNS, OVENS, OR RETORTS, IN SO FAR AS THEY ARE OF KINDS OCCURRING IN MORE THAN ONE KIND OF FURNACE
- F27D21/00—Arrangements of monitoring devices; Arrangements of safety devices
- F27D21/0014—Devices for monitoring temperature
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67109—Apparatus for thermal treatment mainly by convection
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67248—Temperature monitoring
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
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Abstract
Description
Claims (17)
- 웨이퍼와 같은 재료를 에칭하기 위한 에칭 시스템이며,복수의 기설정 위치에서 웨이퍼의 프로파일을 따라 임계 치수 시험 형상을 측정하는 측정 장치와,웨이퍼를 지지하는 척과, 상기 척 내에 배치되고 각각이 웨이퍼 상의 각각의 기설정 위치에 인접하게 위치된 복수의 가열 소자를 구비하며, 상기 측정 장치로부터 웨이퍼를 수납하는 에칭 챔버와,상기 측정 장치와 복수의 가열 소자에 결합되어 있으며, 상기 복수의 기설정 위치 중에서 에칭된 형상의 변동을 감소시키기 위해 공정 중 각각의 가열 소자의 온도를 조절하는 제어기를 포함하는 에칭 시스템.
- 제1항에 있어서, 상기 복수의 기설정 위치는 사실상 웨이퍼의 전체 표면을 덮는 복수의 인접 영역으로 집단으로 형성되고, 상기 각각의 영역은 복수의 가열 소자 중 하나의 가열 소자와 관련된 에칭 시스템.
- 제2항에 있어서, 상기 웨이퍼의 표면은 중심 영역과, 상기 중심 영역 주위의 인접 영역을 포함하는 에칭 시스템.
- 제1항에 있어서, 상기 측정 장치는 분광 임계 치수(CD) 측정 시스템을 포함하는 에칭 시스템.
- 제1항에 있어서, 각각의 기설정 위치에 대한 웨이퍼 표면 상의 국부적인 영역에서 평균 요홈 깊이를 주기적으로 측정하는, 상기 제어기에 결합된 복수의 센서를 더 포함하고,상기 제어기는 측정된 요홈 깊이에 기초하여 각각의 기설정 위치에 대한 국부적인 에칭율을 연산하고, 복수의 기설정 위치 중 국부적인 에칭율의 변동을 감소시키기 위한 공정 중에 각각의 가열 요소의 온도를 조절하는 에칭 시스템.
- 제5항에 있어서, 상기 복수의 센서는 간섭계를 포함하는 에칭 시스템.
- 웨이퍼와 같은 재료를 에칭하기 위한 방법이며,복수의 기설정 위치에서 웨이퍼의 프로파일을 따라 임계 치수 시험 형상을 측정하는 단계와,상기 복수의 기설정 위치에서 웨이퍼의 하부측을 가열하는 단계와,상기 복수의 기설정 위치 중에서 에칭된 형상의 변동을 감소시키기 위해 공정 중 각각의 가열 소자를 조절하는 단계를 포함하는 방법.
- 제7항에 있어서, 상기 복수의 기설정 위치는 사실상 웨이퍼의 전체 표면을 덮는 복수의 인접 영역으로 집단으로 형성되고, 상기 각각의 영역은 하나의 가열 소자와 관련된 방법.
- 제8항에 있어서, 상기 웨이퍼의 표면은 중심 영역과, 상기 중심 영역 주위의 복수의 인접 영역을 포함하는 방법.
- 제7항에 있어서, 상기 측정 단계는 분광 임계 치수(CD) 측정 시스템을 사용하는 단계를 포함하는 방법.
- 제7항에 있어서, 각각의 기설정 위치에서 웨이퍼 표면의 요홈 깊이를 주기적으로 측정하는 단계와,상기 측정된 요홈 깊이에 기초하여 각각의 기설정 위치에서의 국부적인 에칭율을 계산하는 단계와,상기 복수의 기설정 위치들에서 국부적인 에칭율의 변동을 감소시켜 웨이퍼에 걸쳐 최종 요홈 깊이의 변동을 감소시키도록 공정 중에 상기 가열 단계를 조절하는 단계를 더 포함하는 방법.
- 웨이퍼 재료를 에칭하기 위한 장치이며,복수의 기설정 위치에서 웨이퍼의 프로파일을 따라 임계 치수를 측정하기 위한 수단과,상기 복수의 위치에서 웨이퍼의 하부측을 가열하기 위한 수단과,상기 복수의 기설정 위치를 따라 임계 치수의 변동을 감소시키도록 공정 중에 상기 가열 단계를 조절하는 수단을 포함하는 장치.
- 제12항에 있어서, 상기 복수의 기설정 위치는 웨이퍼의 사실상 전체 표면을 덮는 복수의 인접 영역으로 집단으로 형성되고, 각각의 영역은 하나의 가열 요소와 관련되는 장치.
- 제12항에 있어서, 상기 웨이퍼의 표면은 중심 영역과, 상기 중심 영역 주위의 복수의 인접 영역을 포함하는 장치.
- 제14항에 있어서, 각각의 영역의 형상은 6각형인 장치.
- 제12항에 있어서, 각각의 기설정 위치에서 웨이퍼의 표면의 요홈 깊이를 주기적으로 측정하는 수단과,상기 측정된 요홈 깊이에 기초하여 각각의 기설정 위치에서의 국부적인 에칭율을 계산하는 수단과,상기 복수의 기설정 위치들에서 국부적인 에칭율의 변동을 감소시키도록 공정 중에 상기 가열 단계를 조절하는 수단을 더 포함하는 방법.
- 웨이퍼 재료를 에칭하기 위한 에칭 시스템이며,복수의 기설정 위치에서 웨이퍼의 프로파일을 따라 임계 치수 테스트 형상을 측정하기 위한 측정 장치와,상기 측정 장치로부터 웨이퍼를 수용하는 에칭 챔버를 포함하고,상기 에칭 챔버는, 웨이퍼를 지지하는 온도 제어 척과, 웨이퍼 상의 각각의 기설정 위치에 인접하여 위치되는 각각의 영역을 포함하고, 상기 척은 유체로 채워진 복수의 개별 영역을 포함하고, 각각의 영역에서 상기 유체는 재순환 유체 온도 제어 시스템에 의해 다른 온도로 가열되고,상기 에칭 시스템은,상기 측정 장치와 상기 온도 제어 척에 연결되는 제어기를 더 포함하고,상기 제어기는 상기 복수의 기설정 위치들에서 에칭된 형상의 변동을 감소시키도록 공정 중에 각각의 영역에서 유체의 온도를 조절하는 에칭 시스템.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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US10/376,498 | 2003-02-27 | ||
US10/376,498 US6770852B1 (en) | 2003-02-27 | 2003-02-27 | Critical dimension variation compensation across a wafer by means of local wafer temperature control |
PCT/US2004/004134 WO2004077505A2 (en) | 2003-02-27 | 2004-02-12 | Critical dimension variation compensation across a wafer by means of local wafer temperature control |
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KR20050106457A true KR20050106457A (ko) | 2005-11-09 |
KR101047823B1 KR101047823B1 (ko) | 2011-07-08 |
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KR1020057015921A KR101047823B1 (ko) | 2003-02-27 | 2004-02-12 | 국부적인 웨이퍼 온도 제어에 의한 웨이퍼에 걸친 임계 치수 변동 보상 |
Country Status (10)
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US (1) | US6770852B1 (ko) |
EP (1) | EP1599891B1 (ko) |
JP (3) | JP2006519497A (ko) |
KR (1) | KR101047823B1 (ko) |
CN (1) | CN1777974B (ko) |
AT (1) | ATE480003T1 (ko) |
DE (1) | DE602004028910D1 (ko) |
IL (1) | IL170511A (ko) |
TW (1) | TWI338917B (ko) |
WO (1) | WO2004077505A2 (ko) |
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WO2011052831A1 (ko) * | 2009-11-02 | 2011-05-05 | 엘아이디에이디피 주식회사 | 화학기상증착장치의 온도제어방법 |
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US8349241B2 (en) | 2002-10-04 | 2013-01-08 | Molecular Imprints, Inc. | Method to arrange features on a substrate to replicate features having minimal dimensional variability |
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US7323130B2 (en) * | 2002-12-13 | 2008-01-29 | Molecular Imprints, Inc. | Magnification correction employing out-of-plane distortion of a substrate |
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WO2011052832A1 (ko) * | 2009-11-02 | 2011-05-05 | 엘아이지에이디피 주식회사 | 화학기상증착장치 및 화학기상증착장치의 온도제어방법 |
WO2011052831A1 (ko) * | 2009-11-02 | 2011-05-05 | 엘아이디에이디피 주식회사 | 화학기상증착장치의 온도제어방법 |
CN102640260A (zh) * | 2009-11-02 | 2012-08-15 | 丽佳达普株式会社 | 化学气相沉积设备以及化学气相沉积设备的温度控制方法 |
US11622419B2 (en) | 2015-01-18 | 2023-04-04 | Applied Materials, Inc. | Azimuthally tunable multi-zone electrostatic chuck |
US20160345384A1 (en) * | 2015-05-22 | 2016-11-24 | Applied Materials, Inc. | Azimuthally tunable multi-zone electrostatic chuck |
US10440777B2 (en) * | 2015-05-22 | 2019-10-08 | Applied Materials, Inc. | Azimuthally tunable multi-zone electrostatic chuck |
Also Published As
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KR101047823B1 (ko) | 2011-07-08 |
TW200428505A (en) | 2004-12-16 |
EP1599891B1 (en) | 2010-09-01 |
JP2015130539A (ja) | 2015-07-16 |
IL170511A (en) | 2010-04-15 |
CN1777974B (zh) | 2011-02-16 |
TWI338917B (en) | 2011-03-11 |
CN1777974A (zh) | 2006-05-24 |
JP2006519497A (ja) | 2006-08-24 |
WO2004077505A2 (en) | 2004-09-10 |
US6770852B1 (en) | 2004-08-03 |
EP1599891A2 (en) | 2005-11-30 |
JP5844757B2 (ja) | 2016-01-20 |
JP2013077859A (ja) | 2013-04-25 |
ATE480003T1 (de) | 2010-09-15 |
DE602004028910D1 (de) | 2010-10-14 |
WO2004077505A3 (en) | 2005-03-31 |
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