KR20010022326A - 임피던스 제어 회로 - Google Patents

임피던스 제어 회로 Download PDF

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Publication number
KR20010022326A
KR20010022326A KR1020007000905A KR20007000905A KR20010022326A KR 20010022326 A KR20010022326 A KR 20010022326A KR 1020007000905 A KR1020007000905 A KR 1020007000905A KR 20007000905 A KR20007000905 A KR 20007000905A KR 20010022326 A KR20010022326 A KR 20010022326A
Authority
KR
South Korea
Prior art keywords
impedance
output buffer
adjusting
interface circuit
data signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1020007000905A
Other languages
English (en)
Korean (ko)
Inventor
무니스티븐알
헤이콕매튜비
케네디조셉티
Original Assignee
피터 엔. 데트킨
인텔 코오퍼레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 피터 엔. 데트킨, 인텔 코오퍼레이션 filed Critical 피터 엔. 데트킨
Publication of KR20010022326A publication Critical patent/KR20010022326A/ko
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017545—Coupling arrangements; Impedance matching circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0005—Modifications of input or output impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Networks Using Active Elements (AREA)
KR1020007000905A 1997-07-29 1998-07-17 임피던스 제어 회로 Ceased KR20010022326A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US8/902,345 1997-07-29
US08/902,345 US6087847A (en) 1997-07-29 1997-07-29 Impedance control circuit
PCT/US1998/014846 WO1999006845A2 (en) 1997-07-29 1998-07-17 Impedance control circuit

Publications (1)

Publication Number Publication Date
KR20010022326A true KR20010022326A (ko) 2001-03-15

Family

ID=25415727

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020007000905A Ceased KR20010022326A (ko) 1997-07-29 1998-07-17 임피던스 제어 회로

Country Status (8)

Country Link
US (1) US6087847A (https=)
EP (1) EP1010013B1 (https=)
JP (1) JP4274688B2 (https=)
KR (1) KR20010022326A (https=)
AU (1) AU8495298A (https=)
DE (1) DE69822479T2 (https=)
TW (1) TW461995B (https=)
WO (1) WO1999006845A2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100702838B1 (ko) * 2005-05-09 2007-04-03 삼성전자주식회사 반도체 장치에서의 임피던스 콘트롤러블 출력 구동회로 및그에 따른 임피던스 콘트롤 방법

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Publication number Priority date Publication date Assignee Title
KR100702838B1 (ko) * 2005-05-09 2007-04-03 삼성전자주식회사 반도체 장치에서의 임피던스 콘트롤러블 출력 구동회로 및그에 따른 임피던스 콘트롤 방법

Also Published As

Publication number Publication date
TW461995B (en) 2001-11-01
EP1010013B1 (en) 2004-03-17
DE69822479D1 (de) 2004-04-22
JP4274688B2 (ja) 2009-06-10
AU8495298A (en) 1999-02-22
EP1010013A4 (en) 2000-10-18
JP2001512296A (ja) 2001-08-21
DE69822479T2 (de) 2004-08-19
EP1010013A2 (en) 2000-06-21
WO1999006845A3 (en) 1999-09-10
HK1027398A1 (en) 2001-01-12
US6087847A (en) 2000-07-11
WO1999006845A2 (en) 1999-02-11

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