KR102759932B1 - 반도체 소자의 함입형 형상부를 저-저항률 금속으로 충전하기 위한 방법 - Google Patents

반도체 소자의 함입형 형상부를 저-저항률 금속으로 충전하기 위한 방법 Download PDF

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KR102759932B1
KR102759932B1 KR1020217012312A KR20217012312A KR102759932B1 KR 102759932 B1 KR102759932 B1 KR 102759932B1 KR 1020217012312 A KR1020217012312 A KR 1020217012312A KR 20217012312 A KR20217012312 A KR 20217012312A KR 102759932 B1 KR102759932 B1 KR 102759932B1
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layer
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recessed feature
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KR20210057185A (ko
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카이-훙 유
데이비드 오메라
니콜라스 조이
갸나란잔 파타나이크
로버트 클라크
칸다바라 타필리
다카히로 하카마타
코리 바이다
게릿 뢰싱크
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도쿄엘렉트론가부시키가이샤
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    • H01L21/76834—
    • H—ELECTRICITY
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    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
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    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
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    • H10P14/27—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
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    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
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    • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6682—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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    • H10W20/037—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics the barrier, adhesion or liner layers being on top of a main fill metal
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    • H10W20/041—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being discontinuous
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    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4432—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Chemical Vapour Deposition (AREA)
KR1020217012312A 2018-10-10 2019-10-10 반도체 소자의 함입형 형상부를 저-저항률 금속으로 충전하기 위한 방법 Active KR102759932B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201862744038P 2018-10-10 2018-10-10
US62/744,038 2018-10-10
PCT/US2019/055676 WO2020077112A1 (en) 2018-10-10 2019-10-10 Method for filling recessed features in semiconductor devices with a low-resistivity metal

Publications (2)

Publication Number Publication Date
KR20210057185A KR20210057185A (ko) 2021-05-20
KR102759932B1 true KR102759932B1 (ko) 2025-01-23

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Country Status (6)

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US (2) US11024535B2 (https=)
JP (1) JP7406684B2 (https=)
KR (1) KR102759932B1 (https=)
CN (1) CN112805818B (https=)
TW (1) TWI835883B (https=)
WO (1) WO2020077112A1 (https=)

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KR102759932B1 (ko) 2018-10-10 2025-01-23 도쿄엘렉트론가부시키가이샤 반도체 소자의 함입형 형상부를 저-저항률 금속으로 충전하기 위한 방법
US11823896B2 (en) * 2019-02-22 2023-11-21 Taiwan Semiconductor Manufacturing Co., Ltd. Conductive structure formed by cyclic chemical vapor deposition
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US20220139776A1 (en) * 2020-11-03 2022-05-05 Tokyo Electron Limited Method for filling recessed features in semiconductor devices with a low-resistivity metal
US20220254683A1 (en) * 2021-02-05 2022-08-11 Tokyo Electron Limited Removal of stray ruthenium metal nuclei for selective ruthenium metal layer formation
US12237216B2 (en) * 2021-03-16 2025-02-25 Tokyo Electron Limited Method for filling recessed features in semiconductor devices with a low-resistivity metal
JP2024523510A (ja) * 2021-07-06 2024-06-28 東京エレクトロン株式会社 自己組織化単分子層を使用する選択的な膜形成
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JP7803157B2 (ja) * 2022-02-14 2026-01-21 東京エレクトロン株式会社 凹部にルテニウムを埋め込む方法、及び装置
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