KR102102263B1 - 도금막의 제조 방법 - Google Patents

도금막의 제조 방법 Download PDF

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Publication number
KR102102263B1
KR102102263B1 KR1020140057115A KR20140057115A KR102102263B1 KR 102102263 B1 KR102102263 B1 KR 102102263B1 KR 1020140057115 A KR1020140057115 A KR 1020140057115A KR 20140057115 A KR20140057115 A KR 20140057115A KR 102102263 B1 KR102102263 B1 KR 102102263B1
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KR
South Korea
Prior art keywords
main surface
workpiece
plating
film
plating film
Prior art date
Application number
KR1020140057115A
Other languages
English (en)
Korean (ko)
Other versions
KR20140135108A (ko
Inventor
무네아키 구레
요스케 아루가
Original Assignee
신꼬오덴기 고교 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 신꼬오덴기 고교 가부시키가이샤 filed Critical 신꼬오덴기 고교 가부시키가이샤
Publication of KR20140135108A publication Critical patent/KR20140135108A/ko
Application granted granted Critical
Publication of KR102102263B1 publication Critical patent/KR102102263B1/ko

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    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/18—Electroplating using modulated, pulsed or reversing current
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D17/00—Constructional parts, or assemblies thereof, of cells for electrolytic coating
    • C25D17/007—Current directing devices
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60—Electroplating characterised by the structure or texture of the layers
    • C25D5/605—Surface topography of the layers, e.g. rough, dendritic or nodular layers
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60—Electroplating characterised by the structure or texture of the layers
    • C25D5/605—Surface topography of the layers, e.g. rough, dendritic or nodular layers
    • C25D5/611—Smooth layers
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/627—Electroplating characterised by the visual appearance of the layers, e.g. colour, brightness or mat appearance
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Lead Frames For Integrated Circuits (AREA)
KR1020140057115A 2013-05-14 2014-05-13 도금막의 제조 방법 KR102102263B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2013-102470 2013-05-14
JP2013102470A JP6093646B2 (ja) 2013-05-14 2013-05-14 めっき膜の製造方法

Publications (2)

Publication Number Publication Date
KR20140135108A KR20140135108A (ko) 2014-11-25
KR102102263B1 true KR102102263B1 (ko) 2020-04-20

Family

ID=51878578

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020140057115A KR102102263B1 (ko) 2013-05-14 2014-05-13 도금막의 제조 방법

Country Status (5)

Country Link
JP (1) JP6093646B2 (uk)
KR (1) KR102102263B1 (uk)
CN (1) CN104152959B (uk)
MY (1) MY194185A (uk)
TW (1) TWI627315B (uk)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6685112B2 (ja) * 2015-11-18 2020-04-22 株式会社三井ハイテック リードフレーム及びリードフレームパッケージ、並びにこれらの製造方法
JP6621681B2 (ja) * 2016-02-17 2019-12-18 株式会社三井ハイテック リードフレーム及びその製造方法、並びに半導体パッケージ
JP6905031B2 (ja) * 2016-02-17 2021-07-21 株式会社三井ハイテック リードフレーム及び半導体パッケージ
JP6782116B2 (ja) * 2016-08-02 2020-11-11 古河電気工業株式会社 銀被覆材料
CN109468670B (zh) * 2018-11-16 2021-03-26 中山品高电子材料有限公司 引线框架电镀铜层的方法
JP2022547336A (ja) * 2020-11-02 2022-11-11 昆山一鼎工業科技有限公司 リードフレーム表面粗化度の製造設備及び製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100950442B1 (ko) 2009-05-13 2010-04-02 주식회사 모아기술 고주파펄스를 이용한 알루미늄소재의 항균성 표면처리방법

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6179988B1 (en) * 1997-08-29 2001-01-30 Electrocopper Products Limited Process for making copper wire
JP3690603B2 (ja) * 2002-11-28 2005-08-31 株式会社中央製作所 連続式めっきの電流制御方法
CN2587889Y (zh) * 2002-12-11 2003-11-26 吕明 制造高孔隙率金属带材的电沉积设备
JP2005097721A (ja) * 2003-08-27 2005-04-14 Yamaha Corp 両面メッキ装置および両面メッキ方法
CN2712947Y (zh) * 2004-07-20 2005-07-27 戴其金 一种双阳极电镀槽
JP4981488B2 (ja) * 2007-03-09 2012-07-18 古河電気工業株式会社 粗化圧延銅板およびその製造方法
KR20100066988A (ko) * 2008-12-10 2010-06-18 삼성테크윈 주식회사 전자회로기판의 균일 도금 방법
CN102337578B (zh) * 2010-07-19 2014-04-02 北大方正集团有限公司 一种双面电镀槽、板件及电镀方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100950442B1 (ko) 2009-05-13 2010-04-02 주식회사 모아기술 고주파펄스를 이용한 알루미늄소재의 항균성 표면처리방법

Also Published As

Publication number Publication date
KR20140135108A (ko) 2014-11-25
TWI627315B (zh) 2018-06-21
JP6093646B2 (ja) 2017-03-08
CN104152959B (zh) 2018-11-13
CN104152959A (zh) 2014-11-19
MY194185A (en) 2022-11-17
JP2014221941A (ja) 2014-11-27
TW201500599A (zh) 2015-01-01

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