KR101994715B1 - 전자 소자 모듈 제조 방법 - Google Patents

전자 소자 모듈 제조 방법 Download PDF

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Publication number
KR101994715B1
KR101994715B1 KR1020130072236A KR20130072236A KR101994715B1 KR 101994715 B1 KR101994715 B1 KR 101994715B1 KR 1020130072236 A KR1020130072236 A KR 1020130072236A KR 20130072236 A KR20130072236 A KR 20130072236A KR 101994715 B1 KR101994715 B1 KR 101994715B1
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KR
South Korea
Prior art keywords
substrate
electronic
mold
mold part
electronic device
Prior art date
Application number
KR1020130072236A
Other languages
English (en)
Korean (ko)
Other versions
KR20150000173A (ko
Inventor
장민석
정태성
김광명
Original Assignee
삼성전기주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 삼성전기주식회사 filed Critical 삼성전기주식회사
Priority to KR1020130072236A priority Critical patent/KR101994715B1/ko
Priority to CN201310429630.6A priority patent/CN104241255B/zh
Publication of KR20150000173A publication Critical patent/KR20150000173A/ko
Application granted granted Critical
Publication of KR101994715B1 publication Critical patent/KR101994715B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • H01L2924/1816Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161Exposing the passive side of the semiconductor or solid-state body of a flip chip
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19106Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Combinations Of Printed Boards (AREA)
KR1020130072236A 2013-06-24 2013-06-24 전자 소자 모듈 제조 방법 KR101994715B1 (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020130072236A KR101994715B1 (ko) 2013-06-24 2013-06-24 전자 소자 모듈 제조 방법
CN201310429630.6A CN104241255B (zh) 2013-06-24 2013-09-18 电子组件模块及其制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020130072236A KR101994715B1 (ko) 2013-06-24 2013-06-24 전자 소자 모듈 제조 방법

Publications (2)

Publication Number Publication Date
KR20150000173A KR20150000173A (ko) 2015-01-02
KR101994715B1 true KR101994715B1 (ko) 2019-07-01

Family

ID=52229067

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020130072236A KR101994715B1 (ko) 2013-06-24 2013-06-24 전자 소자 모듈 제조 방법

Country Status (2)

Country Link
KR (1) KR101994715B1 (zh)
CN (1) CN104241255B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11439011B2 (en) 2020-10-23 2022-09-06 Samsung Electro-Mechanics Co., Ltd. Electronic device module and method of manufacturing electronic device module

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112014006417T5 (de) * 2014-04-30 2016-12-08 Intel Corporation Integrierte Schaltungsanordnungen mit Formmasse
US10163867B2 (en) 2015-11-12 2018-12-25 Amkor Technology, Inc. Semiconductor package and manufacturing method thereof
KR101712288B1 (ko) * 2015-11-12 2017-03-03 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 그 제조 방법
US10872879B2 (en) 2015-11-12 2020-12-22 Amkor Technology Singapore Holding Pte. Ltd. Semiconductor package and manufacturing method thereof
CN110024115B (zh) 2016-10-04 2024-02-02 天工方案公司 具有包覆模制结构的双侧射频封装
US10410999B2 (en) 2017-12-19 2019-09-10 Amkor Technology, Inc. Semiconductor device with integrated heat distribution and manufacturing method thereof
KR102061564B1 (ko) 2018-05-04 2020-01-02 삼성전자주식회사 팬-아웃 반도체 패키지
KR102107025B1 (ko) * 2018-09-14 2020-05-07 삼성전기주식회사 전자 소자 모듈 및 그 제조 방법
KR102400533B1 (ko) * 2020-08-12 2022-05-19 삼성전기주식회사 전자 소자 모듈 및 이의 제조방법
WO2022091954A1 (ja) * 2020-10-29 2022-05-05 株式会社村田製作所 高周波モジュール及び通信装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004095836A (ja) * 2002-08-30 2004-03-25 Casio Comput Co Ltd 半導体装置およびその製造方法
JP2009177209A (ja) * 2009-05-11 2009-08-06 Nec Electronics Corp 半導体装置およびその製造方法

Family Cites Families (6)

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JP2001144218A (ja) * 1999-11-17 2001-05-25 Sony Corp 半導体装置及び半導体装置の製造方法
JP2003092377A (ja) 2001-07-09 2003-03-28 Fujitsu Ltd 半導体装置
KR101213661B1 (ko) * 2005-03-31 2012-12-17 스태츠 칩팩, 엘티디. 칩 스케일 패키지 및 제 2 기판을 포함하고 있으며 상부면및 하부면에서 노출된 기판 표면들을 갖는 반도체 어셈블리
TWI460844B (zh) * 2009-04-06 2014-11-11 King Dragon Internat Inc 具有內嵌式晶片及矽導通孔晶粒之堆疊封裝結構及其製造方法
KR101274460B1 (ko) * 2011-11-22 2013-06-18 삼성전기주식회사 반도체 패키지 및 그 제조 방법
CN202394957U (zh) * 2011-11-24 2012-08-22 日月光半导体(上海)股份有限公司 半导体晶圆及封装构造

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004095836A (ja) * 2002-08-30 2004-03-25 Casio Comput Co Ltd 半導体装置およびその製造方法
JP2009177209A (ja) * 2009-05-11 2009-08-06 Nec Electronics Corp 半導体装置およびその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11439011B2 (en) 2020-10-23 2022-09-06 Samsung Electro-Mechanics Co., Ltd. Electronic device module and method of manufacturing electronic device module

Also Published As

Publication number Publication date
CN104241255A (zh) 2014-12-24
KR20150000173A (ko) 2015-01-02
CN104241255B (zh) 2018-04-10

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