KR101743101B1 - 반도체 기판의 에칭 방법 및 반도체 소자의 제조 방법 - Google Patents

반도체 기판의 에칭 방법 및 반도체 소자의 제조 방법 Download PDF

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Publication number
KR101743101B1
KR101743101B1 KR1020157007889A KR20157007889A KR101743101B1 KR 101743101 B1 KR101743101 B1 KR 101743101B1 KR 1020157007889 A KR1020157007889 A KR 1020157007889A KR 20157007889 A KR20157007889 A KR 20157007889A KR 101743101 B1 KR101743101 B1 KR 101743101B1
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KR
South Korea
Prior art keywords
etching
silicon
etching solution
substrate
acid
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KR1020157007889A
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English (en)
Korean (ko)
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KR20150048221A (ko
Inventor
아츠시 미즈타니
테츠야 시미즈
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후지필름 가부시키가이샤
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Publication of KR20150048221A publication Critical patent/KR20150048221A/ko
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
KR1020157007889A 2012-11-13 2013-11-08 반도체 기판의 에칭 방법 및 반도체 소자의 제조 방법 KR101743101B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2012249674A JP2014099480A (ja) 2012-11-13 2012-11-13 半導体基板のエッチング方法及び半導体素子の製造方法
JPJP-P-2012-249674 2012-11-13
PCT/JP2013/080259 WO2014077199A1 (ja) 2012-11-13 2013-11-08 半導体基板のエッチング方法及び半導体素子の製造方法

Publications (2)

Publication Number Publication Date
KR20150048221A KR20150048221A (ko) 2015-05-06
KR101743101B1 true KR101743101B1 (ko) 2017-06-02

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KR1020157007889A KR101743101B1 (ko) 2012-11-13 2013-11-08 반도체 기판의 에칭 방법 및 반도체 소자의 제조 방법

Country Status (4)

Country Link
JP (1) JP2014099480A (zh)
KR (1) KR101743101B1 (zh)
TW (1) TWI683361B (zh)
WO (1) WO2014077199A1 (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10781371B2 (en) 2018-05-26 2020-09-22 Sk Innovation Co., Ltd. Etchant composition and silane compound
US10836962B2 (en) 2018-05-26 2020-11-17 Sk Innovation Co., Ltd. Etchant composition, method of etching insulating film, method of manufacturing semiconductor device, and silane compound
US11594421B2 (en) 2017-10-12 2023-02-28 Semes Co., Ltd. Substrate treating apparatus and substrate treating method

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10147619B2 (en) 2015-08-27 2018-12-04 Toshiba Memory Corporation Substrate treatment apparatus, substrate treatment method, and etchant
JP6446003B2 (ja) * 2015-08-27 2018-12-26 東芝メモリ株式会社 基板処理装置、基板処理方法およびエッチング液
KR102446076B1 (ko) * 2015-11-19 2022-09-22 솔브레인 주식회사 식각 조성물 및 이를 이용한 반도체 소자의 제조방법
CN106783739B (zh) * 2015-11-24 2019-08-23 旺宏电子股份有限公司 垂直存储单元的半导体元件及其制造方法
JP2017103328A (ja) 2015-12-01 2017-06-08 株式会社東芝 半導体装置及びその製造方法
US10325779B2 (en) 2016-03-30 2019-06-18 Tokyo Electron Limited Colloidal silica growth inhibitor and associated method and system
US10515820B2 (en) 2016-03-30 2019-12-24 Tokyo Electron Limited Process and apparatus for processing a nitride structure without silica deposition
KR102113189B1 (ko) * 2016-08-23 2020-06-03 오씨아이 주식회사 식각 후 식각 용액의 후처리 방법
CN109689838A (zh) 2016-12-26 2019-04-26 秀博瑞殷株式公社 蚀刻用组合物和使用该蚀刻用组合物制造半导体器件的方法
WO2018168874A1 (ja) * 2017-03-15 2018-09-20 株式会社 東芝 エッチング液、エッチング方法、及び電子部品の製造方法
KR101828437B1 (ko) * 2017-04-06 2018-03-29 주식회사 디엔에스 실리콘 질화막 식각용 조성물.
SG11202001854VA (en) * 2017-09-06 2020-03-30 Entegris Inc Compositions and methods for etching silicon nitride-containing substrates
JP6994898B2 (ja) * 2017-10-19 2022-01-14 東京エレクトロン株式会社 基板処理装置、基板処理方法およびプログラム
KR102084164B1 (ko) * 2018-03-06 2020-05-27 에스케이씨 주식회사 반도체 공정용 조성물 및 반도체 공정
KR102324275B1 (ko) * 2018-05-03 2021-11-09 삼성에스디아이 주식회사 실리콘 질화막 에칭 조성물 및 이를 이용한 에칭 방법
JP7438211B2 (ja) 2018-11-15 2024-02-26 インテグリス・インコーポレーテッド 窒化ケイ素エッチング組成物及び方法
JP7160642B2 (ja) * 2018-11-16 2022-10-25 株式会社Screenホールディングス 基板処理方法、3次元メモリデバイスの製造方法および基板処理装置
CN110804441A (zh) * 2019-11-08 2020-02-18 湖北兴福电子材料有限公司 一种抑制二氧化硅蚀刻的磷酸蚀刻液

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008047796A (ja) * 2006-08-21 2008-02-28 Tosoh Corp エッチング用組成物及びエッチング方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4092211A (en) * 1976-11-18 1978-05-30 Northern Telecom Limited Control of etch rate of silicon dioxide in boiling phosphoric acid
JPH04188728A (ja) * 1990-11-22 1992-07-07 Hitachi Ltd 湿式エッチング装置
US5472562A (en) * 1994-08-05 1995-12-05 At&T Corp. Method of etching silicon nitride
JPH1050682A (ja) * 1996-08-01 1998-02-20 Seiko Epson Corp 半導体装置の製造方法及び製造装置及び半導体装置
JP3813716B2 (ja) * 1997-11-20 2006-08-23 大日本スクリーン製造株式会社 基板の表面処理方法
US6162370A (en) * 1998-08-28 2000-12-19 Ashland Inc. Composition and method for selectively etching a silicon nitride film
EP1193493A1 (en) * 2000-09-29 2002-04-03 Infineon Technologies SC300 GmbH & Co. KG Method and apparatus for measuring and controlling the water content of a water containing liquid mixture
US7238295B2 (en) * 2002-09-17 2007-07-03 m·FSI Ltd. Regeneration process of etching solution, etching process, and etching system
JP3788985B2 (ja) * 2002-09-17 2006-06-21 エム・エフエスアイ株式会社 エッチング液の再生方法、エッチング方法およびエッチング装置
JP2007258405A (ja) * 2006-03-23 2007-10-04 Dainippon Screen Mfg Co Ltd 基板処理方法および基板処理装置
TW200849371A (en) * 2007-02-28 2008-12-16 Tosoh Corp Etching method and etching composition useful for the method
JP2012182272A (ja) * 2011-03-01 2012-09-20 Seiko Npc Corp 半導体製造装置
US9257292B2 (en) * 2011-03-30 2016-02-09 Tokyo Electron Limited Etch system and method for single substrate processing

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008047796A (ja) * 2006-08-21 2008-02-28 Tosoh Corp エッチング用組成物及びエッチング方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11594421B2 (en) 2017-10-12 2023-02-28 Semes Co., Ltd. Substrate treating apparatus and substrate treating method
US10781371B2 (en) 2018-05-26 2020-09-22 Sk Innovation Co., Ltd. Etchant composition and silane compound
US10836962B2 (en) 2018-05-26 2020-11-17 Sk Innovation Co., Ltd. Etchant composition, method of etching insulating film, method of manufacturing semiconductor device, and silane compound
US11365350B2 (en) 2018-05-26 2022-06-21 Sk Innovation Co., Ltd. Silane compound

Also Published As

Publication number Publication date
TW201432809A (zh) 2014-08-16
JP2014099480A (ja) 2014-05-29
KR20150048221A (ko) 2015-05-06
TWI683361B (zh) 2020-01-21
WO2014077199A1 (ja) 2014-05-22

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