KR101630037B1 - Multi-layered ceramic capacitor, array-type multi-layered ceramic capacitor, manufacturing method for the same and board having the same mounted thereon - Google Patents

Multi-layered ceramic capacitor, array-type multi-layered ceramic capacitor, manufacturing method for the same and board having the same mounted thereon Download PDF

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KR101630037B1
KR101630037B1 KR1020140054550A KR20140054550A KR101630037B1 KR 101630037 B1 KR101630037 B1 KR 101630037B1 KR 1020140054550 A KR1020140054550 A KR 1020140054550A KR 20140054550 A KR20140054550 A KR 20140054550A KR 101630037 B1 KR101630037 B1 KR 101630037B1
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ceramic
plating layers
electrodes
pair
layers
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KR20150127965A (en
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박흥길
박민철
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삼성전기주식회사
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Abstract

The present invention relates to a ceramic body comprising a ceramic body in which a plurality of dielectric layers are stacked in a thickness direction; A plurality of first and second inner electrodes disposed alternately in the ceramic body through both end faces of the ceramic body with the dielectric layer interposed therebetween; First and second external electrodes formed to cover both ends of the ceramic body; First and second bump electrodes formed on a mounting surface of the ceramic body to cover a part of the first and second external electrodes; And a second electrode formed on the second electrode.

Description

TECHNICAL FIELD The present invention relates to a multilayer ceramic capacitor, an array type multilayer ceramic capacitor, a method of manufacturing the multilayer ceramic capacitor, and a mounting substrate therefor. BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a multilayer ceramic capacitor,

The present invention relates to a multilayer ceramic capacitor, an array type multilayer ceramic capacitor, a manufacturing method thereof, and a mounting substrate therefor.

Multi-layered ceramic capacitors (MLCC), which is one of the multilayer chip electronic components, can be used in various electronic devices because of their small size, high capacity and easy mounting.

For example, the multilayer ceramic capacitor may be applied to a display device such as a liquid crystal display (LCD) and a plasma display panel (PDP), a computer, a personal digital assistant (PDA) And can be used in a chip type capacitor which is mounted on a substrate of various electronic products and plays a role of charging or discharging electricity.

Such a multilayer ceramic capacitor may have a structure in which a plurality of dielectric layers and internal electrodes of different polarities are alternately arranged between the dielectric layers.

At this time, since the dielectric layer has piezoelectricity, when a direct current or an alternating voltage is applied to the multilayer ceramic capacitor, a piezoelectric phenomenon occurs between the internal electrodes, thereby expanding and contracting the volume of the ceramic body according to the frequency, .

Such vibration may be transmitted to the substrate through the external electrode of the multilayer ceramic capacitor and the solder connecting the external electrode and the substrate, so that the entire substrate may be an acoustic reflection surface and generate a noisy vibration noise.

Such a vibration sound may correspond to an audible frequency in the range of 20 to 20,000 Hz which is uncomfortable to a person, and an unpleasant vibration sound is called an acoustic noise.

The solder connecting the external electrode and the substrate is formed to be inclined at a constant height along the surface of the external electrode at both sides or both end faces of the ceramic body.

In this case, as the volume and height of the solder become larger, the vibration of the multilayer ceramic capacitor is more easily transmitted to the substrate, which increases the magnitude of the acoustic noise generated.

Korean Patent No. 1058697

In recent electronic devices, acoustic noise generated in such a multilayer ceramic capacitor may appear more conspicuously due to low noise of the parts.

There is a need in the art for a new method for effectively reducing the acoustic noise of a multilayer ceramic capacitor.

One aspect of the present invention is a ceramic body comprising: a ceramic body in which a plurality of dielectric layers are stacked in a thickness direction; A plurality of first and second inner electrodes disposed alternately in the ceramic body through both end faces of the ceramic body with the dielectric layer interposed therebetween; First and second external electrodes formed to cover both ends of the ceramic body; First and second bump electrodes formed on a mounting surface of the ceramic body to cover a part of the first and second external electrodes; And a second electrode formed on the second electrode.

Another aspect of the present invention is a ceramic body comprising: a ceramic body in which a plurality of dielectric layers are stacked in a thickness direction; A pair of first external electrodes formed to be opposite to each other on both sides of the ceramic body and each extending to a part of the mounting surface of the ceramic body; A pair of second external electrodes formed to be opposite to each other on both side surfaces of the ceramic body at a position spaced apart from the first external electrode and each extending to a part of the mounting surface of the ceramic body; And a pair of first lead portions which are exposed through both side surfaces of the ceramic body and connected to the pair of first external electrodes in the ceramic body so as to face each other with the dielectric layer interposed therebetween, A plurality of second internal electrodes exposed through both side surfaces of the ceramic body and having a pair of second lead portions connected to the pair of second external electrodes; A first bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover a part of the pair of first external electrodes; A second bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover a portion of the pair of second external electrodes; And a second electrode formed on the second electrode.

In one embodiment of the present invention, the first and second bump electrodes include first and second conductive resin layers formed on mounting surfaces of the ceramic body, first and second conductive resin layers formed on the first and second conductive resin layers, And a second plating layer.

In an embodiment of the present invention, the first and second plating layers include first and second nickel (Ni) plating layers, first and second tin (Sn) layers formed on the first and second nickel plating layers, Plating layer.

In an embodiment of the present invention, the first and second plating layers include first and second copper (Cu) plating layers, first and second nickel (Ni) coating layers formed on the first and second copper plating layers, A plated layer, and first and second tin (Sn) plating layers formed on the first and second nickel plating layers, respectively.

In one embodiment of the present invention, the first and second bumper electrodes may have a thickness of 50 탆 or more.

In one embodiment of the present invention, the first and second external electrodes include first and second connecting portions formed on both end faces of the ceramic body and connected to the first and second internal electrodes, respectively, And first and second terminal portions extending from the second connection portion to a part of the mounting surface of the ceramic body, wherein the first and second bump electrodes are formed to cover a part of the first and second terminal portions .

In an embodiment of the present invention, third and fourth plating layers may be formed on the first and second external electrodes.

In an embodiment of the present invention, the third and fourth plating layers include third and fourth nickel (Ni) plating layers, third and fourth tin (Sn) layers formed on the third and fourth nickel plating layers, Plating layer.

In one embodiment of the present invention, the third and fourth plating layers include third and fourth copper (Cu) plating layers, third and fourth nickel (Ni) layers formed on the third and fourth copper plating layers, A plated layer, and third and fourth tin (Sn) plated layers formed on the third and fourth nickel plated layers, respectively.

In one embodiment of the present invention, first and second insulating layers may be formed on both ends of the ceramic body to cover a part of the first and second external electrodes.

Another aspect of the present invention is a ceramic body comprising: a ceramic body having a plurality of dielectric layers stacked; First and second external electrodes formed on both sides of the ceramic body so as to face each other and extending to a part of the mounting surface of the ceramic body and having a plurality of pairs spaced apart in the longitudinal direction of the ceramic body; A plurality of first and second internal electrodes disposed opposite to each other with the dielectric layer interposed therebetween in the ceramic body and alternately exposed through both side surfaces of the ceramic body and connected to the first and second external electrodes respectively; And a bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover part of the first and second external electrodes formed opposite to each other, wherein a plurality of pairs of the bump electrodes are spaced apart from each other in the longitudinal direction of the ceramic body; The present invention provides an array type multilayer ceramic capacitor including:

According to another aspect of the present invention, a plurality of ceramic sheets each having first and second internal electrodes formed thereon are alternately stacked and pressed so that the first and second internal electrodes are disposed to face each other with the ceramic sheet interposed therebetween, Providing a sieve; Providing a ceramic body in which the laminate is cut and fired for each region corresponding to one capacitor to alternately expose the first and second internal electrodes through both end faces of the ceramic body; Forming first and second external electrodes on both ends of the ceramic body so as to be electrically connected to the first and second internal electrodes; Applying a conductive resin paste to a mounting surface of the ceramic body so as to cover a part of the exposed portions of the first and second external electrodes, and then performing electroplating to form first and second bump electrodes; The present invention also provides a method of manufacturing a multilayer ceramic capacitor.

Another aspect of the present invention is a ceramic sheet comprising a first internal electrode having a pair of first lead portions exposed through both side surfaces of a ceramic sheet and a pair of second internal electrodes exposed through both sides of the ceramic sheet but not overlapping with the first lead portion A plurality of ceramic sheets each having second internal electrodes each having a second lead portion are stacked and pressed so that the first and second internal electrodes alternate with each other with the ceramic sheet interposed therebetween; Providing a ceramic body in which the laminate is cut and fired for each region corresponding to one capacitor so that the pair of first and second lead portions are exposed through both sides of the ceramic body; Forming a pair of first and second external electrodes so as to extend from both sides of the ceramic body to a part of the mounting surface of the ceramic body and electrically connected to the first and second lead portions, ; Applying a conductive resin paste so as to simultaneously cover a part of the exposed mounting surfaces of the pair of first and second external electrodes, respectively, and then performing electroplating to form first and second bump electrodes; The present invention also provides a method of manufacturing a multilayer ceramic capacitor.

In one embodiment of the present invention, in the step of forming the first and second bump electrodes, the electroplating may be performed in the order of nickel plating and tin plating.

In one embodiment of the present invention, in the step of forming the first and second bump electrodes, the electroplating may be performed in the order of copper plating, nickel plating and tin plating.

In one embodiment of the present invention, electroplating of the first and second external electrodes may be further performed.

Yet another aspect of the present invention provides a plasma display panel comprising: a substrate having first and second electrode pads on top; And at least one multilayer ceramic capacitor mounted on the substrate; The present invention also provides a mounting substrate for a multilayer ceramic capacitor.

According to an embodiment of the present invention, a bump electrode is formed on a mounting surface of an external electrode to absorb vibration transmitted from the external electrode to the substrate when the multilayer ceramic capacitor is mounted on the substrate, Can be reduced.

1 is a perspective view schematically showing a multilayer ceramic capacitor according to a first embodiment of the present invention with its mounting surface facing upward.
2 is a sectional view taken along the line A-A 'in Fig.
FIGS. 3A to 3C are perspective views sequentially illustrating a method of manufacturing a multilayer ceramic capacitor according to a first embodiment of the present invention.
4 is a side sectional view schematically showing a mounting substrate of a multilayer ceramic capacitor according to a first embodiment of the present invention.
5 is a perspective view schematically showing the length of the bump electrode in the multilayer ceramic capacitor according to the first embodiment of the present invention, which is shorter than the width of the ceramic body.
6 is a perspective view schematically showing a multilayer ceramic capacitor according to a second embodiment of the present invention with its mounting surface facing upward.
7 is a perspective view schematically showing a multilayer ceramic capacitor according to a third embodiment of the present invention with its mounting surface facing upward.
8 is an exploded perspective view showing the internal electrode structure of the multilayer ceramic capacitor of FIG.
9 is a perspective view schematically showing the length of the bump electrode in the multilayer ceramic capacitor according to the second embodiment of the present invention, which is shorter than the width of the ceramic body.
10A to 10C are perspective views sequentially showing a method of manufacturing a multilayer ceramic capacitor according to a third embodiment of the present invention.
11 is a side cross-sectional view schematically showing a mounting substrate of a multilayer ceramic capacitor according to a third embodiment of the present invention.
12 is a perspective view schematically showing an array type multilayer ceramic capacitor according to an embodiment of the present invention in which a bump electrode is omitted.
13 is a perspective view schematically showing an array type multilayer ceramic capacitor according to an embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below.

Further, the embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art.

The shape and size of elements in the drawings may be exaggerated for clarity.

In the drawings, like reference numerals are used to designate like elements that are functionally equivalent to the same reference numerals in the drawings.

FIG. 1 is a perspective view schematically showing a multilayer ceramic capacitor according to a first embodiment of the present invention with its mounting surface facing upward, and FIG. 2 is a sectional view taken along line A-A 'of FIG.

1 and 2, a multilayer ceramic capacitor 100 according to the first embodiment includes a ceramic body 110, a plurality of first and second inner electrodes 121 and 122, Electrodes 131 and 132, and first and second bump electrodes.

The ceramic body 110 is formed by laminating a plurality of dielectric layers 111 in the thickness direction and then firing.

The dielectric layers 111 adjacent to each other of the ceramic body 110 can be integrated so that the boundaries can not be confirmed.

In addition, the ceramic body 110 may have a conical shape, but the present invention is not limited thereto.

In this embodiment, for convenience of explanation, the upper and lower surfaces of the ceramic body 110 in the thickness direction facing each other in the vertical direction in which the dielectric layers 111 are laminated are referred to as upper and lower surfaces, and the first and second bump electrodes 151, 152 is formed as a mounting surface, a surface in the longitudinal direction connecting the upper and lower surfaces and a surface in the longitudinal direction opposing to each other is defined as both sides, and a surface in the width direction opposite to the direction perpendicular to the both end surfaces is defined as both sides do.

The dimensions of the ceramic body 110 are not particularly limited. For example, the size of the ceramic body 110 may be 1.0 mm x 0.5 mm to constitute a multilayer ceramic capacitor 100 of a high capacity.

On the upper and lower surfaces, which are the outermost surfaces of the ceramic body 110, cover layers 112 and 113 having a predetermined thickness can be formed, if necessary.

The thickness of one layer of the dielectric layer 111 can be arbitrarily changed in accordance with the capacity design of the multilayer ceramic capacitor 100. The thickness of one layer of the dielectric layer 11 is preferably set to be about 1.0 占 퐉 after firing, The invention is not limited thereto.

In addition, the dielectric layer 111 may include a ceramic material having a high dielectric constant, for example, BaTiO 3 ceramic powder, but the present invention is not limited thereto.

The BaTiO 3 based ceramic powder, for example, BaTiO 3 Ca, Zr, etc., some employ a (Ba 1 -x Ca x) TiO 3, Ba (Ti 1 - y Ca y) O 3, (Ba 1 - x Ca x ) (Ti 1 - y Zr y ) O 3 or Ba (Ti 1 - y Zr y ) O 3 , and the present invention is not limited thereto.

In addition, a ceramic additive, an organic solvent, a plasticizer, a binder, a dispersant and the like may be further added to the dielectric layer 111 together with the ceramic powder.

The ceramic additive may be, for example, a transition metal oxide or a carbide, a rare earth element, magnesium (Mg), or aluminum (Al).

The first and second internal electrodes 121 and 122 are formed on and stacked on a ceramic sheet forming a dielectric layer 111 and then fired to form a ceramic body 110 with one dielectric layer 111 sandwiched therebetween. Respectively.

The first and second internal electrodes 121 and 122 are a pair of electrodes having polarities different from each other. The first and second internal electrodes 121 and 122 are disposed opposite to each other in the stacking direction of the dielectric layers 111, They can be electrically insulated from each other.

One end of each of the first and second internal electrodes 121 and 122 is exposed through both end faces of the ceramic body 110.

The end portions of the first and second internal electrodes 121 and 122 alternately exposed through both end faces of the ceramic body 110 are connected to the first and second external electrodes 131 and 132 at both end faces of the ceramic body 110, And can be electrically connected to each other.

The first and second internal electrodes 121 and 122 may be formed of a conductive metal such as Ni or Ni alloy. However, the present invention is not limited thereto .

When a predetermined voltage is applied to the first and second external electrodes 131 and 132, charges are accumulated between the first and second internal electrodes 121 and 122, which are opposed to each other.

At this time, the capacitance of the multilayer ceramic capacitor 100 is proportional to the overlapping area of the first and second internal electrodes 121 and 122 overlapping each other along the stacking direction of the dielectric layers 111.

The first and second external electrodes 131 and 132 are formed by firing the conductive paste for the external electrode containing copper (Cu) in order to provide a high reliability such as excellent heat resistance and moisture resistance while having good electrical characteristics. And the present invention is not limited thereto.

The first and second external electrodes 131 and 132 may include first and second connection portions, and first and second terminal portions.

The first and second connection portions are respectively formed on both end surfaces of the ceramic body 110 and electrically connected to the exposed ends of the first and second internal electrodes 121 and 122, respectively.

The first and second terminal portions are portions extending from the first and second connection portions to a portion of the mounting surface of the ceramic body 110, respectively.

On the other hand, the first and second external electrodes 131 and 132 may be formed of a chip having a vertically symmetrical structure by forming a terminal portion on the upper surface of the ceramic body 110 so as to face the first and second terminal portions, .

When the terminal portions are formed in the vertically symmetrical structure on the upper and lower surfaces of the ceramic body 110, there is an advantage that the division in the vertical direction is not required when the multilayer ceramic capacitor 100 is mounted on a substrate or the like.

On the other hand, third and fourth plating layers 141 and 142 may be formed on the first and second external electrodes 131 and 132, respectively.

The third and fourth plating layers 141 and 142 include first and second nickel (Ni) plating layers respectively formed on the first and second external electrodes 131 and 132, And a first and a second tin (Sn) plating layers respectively formed on the nickel plating layer.

As another example, the third and fourth plating layers 141 and 142 may include first and second copper (Cu) plating layers respectively formed on the first and second external electrodes 131 and 132, First and second nickel (Ni) plating layers respectively formed on the second copper plating layer, and first and second tin (Sn) plating layers respectively formed on the first and second nickel plating layers.

On the mounting surface of the ceramic body 110, first and second bump electrodes are formed to cover a part of the first and second external electrodes 131 and 132.

The first and second bump electrodes may function as an electrical connection element only by covering a part of the first and second external electrodes 131 and 132.

The first and second bump electrodes may include first and second conductive resin layers 151 and 152 formed on the lower surface of the ceramic body 110 and first and second conductive resin layers 151 and 152 on the first and second conductive resin layers 151 and 152, And may include first and second plating layers 161 and 162 formed thereon.

The first and second conductive resin layers 151 and 152 may be formed of a conductive resin paste obtained by mixing a metal material such as copper or silver and a thermosetting resin such as epoxy or phenol resin with a solvent. It is not.

The first and second plating layers 161 and 162 are for electrically stabilizing the bonding between the first and second bump electrodes and the first and second external electrodes 131 and 132. For example, Film or the like.

For example, the first and second plating layers 161 and 162 may include first and second nickel (Ni) plating layers respectively formed on the first and second conductive resin layers 151 and 152, And a first and a second tin (Sn) plating layers respectively formed on the nickel plating layer.

At this time, the first and second bumper electrodes may preferably have a thickness of 50 mu m or more.

Table 1 below shows the acoustic noise according to the thickness of the first and second bump electrodes.

Here, the size of the multilayer ceramic capacitor used was 1.0 mm x 0.5 mm x 0.5 mm in length x width x thickness, and the acoustic noise of each sample was measured at DC 4 V, AC 1 Vrms @ 4 KHz.

# Bump Thickness (탆) Acoustic Noise (dB) One -
(Without bump electrode)
34
2 20 28 3 50 19 4 80 15 5 120 12

Referring to Table 1, in the case of the multilayer ceramic capacitor of the sample 1 having no bump electrode, the acoustic noise was as high as 34 dB.

On the contrary, according to the present embodiment, it can be seen that the acoustic noise of the multilayer ceramic capacitors of the samples 2 to 5 including the bump electrodes is less than 30 dB, as compared with the sample 1.

Particularly, in the case of the samples 3 to 5, in which the thickness of the bump electrode is 50 m or more, the acoustic noise of the multilayer ceramic capacitor is remarkably reduced to less than 20 dB.

For example, in the case of the sample 3 in which the height of the bump electrode is 50 μm, the acoustic noise can be reduced by about 15 dB as compared with the sample 1. Since a remarkable effect can be obtained when the height of the bump electrode is 50 占 퐉 or more as described above, the thickness of the bump electrode is preferably 50 占 퐉 or more.

The first and second plating layers 161 and 162 of the first and second bump electrodes may include first and second nickel layers 151 and 152 formed on the first and second conductive resin layers 151 and 152, (Ni) plating layer, and first and second tin (Sn) plating layers respectively formed on the first and second nickel plating layers.

As another example, the first and second plating layers 161 and 162 of the first and second bump electrodes may include first and second copper layers 151 and 152 formed on the first and second conductive resin layers 151 and 152, respectively, (Cu) plating layer formed on the first and second nickel plating layers, first and second nickel (Ni) plating layers respectively formed on the first and second copper plating layers, first and second tin ) Plating layer.

FIGS. 3A to 3C are perspective views sequentially illustrating a method of manufacturing a multilayer ceramic capacitor according to a first embodiment of the present invention.

Hereinafter, a method of manufacturing the multilayer ceramic capacitor according to the first embodiment of the present invention will be described with reference to FIGS. 3A to 3C.

First, a plurality of ceramic sheets are provided.

The ceramic sheet is for forming the dielectric layer 111 of the ceramic body 110.

The ceramic sheet may be prepared by mixing a ceramic powder, a polymer and a solvent to prepare a slurry, and the slurry may be formed into a sheet having a thickness of several micrometers by a method such as a doctor blade.

Next, conductive paste is printed on at least one surface of each of the ceramic sheets to a predetermined thickness to form first and second internal electrodes 121 and 122.

At this time, the first and second internal electrodes 121 and 122 are formed such that their end portions are exposed through opposite opposite end faces of the ceramic sheet, respectively.

The conductive paste may be printed by a screen printing method or a gravure printing method, but the present invention is not limited thereto.

Next, a plurality of ceramic sheets on which the first and second inner electrodes 121 and 122 are formed are alternately laminated such that the ends of the first and second inner electrodes 121 and 122 are exposed through both end faces of the laminate, respectively .

Thereafter, a plurality of stacked ceramic sheets are pressed from the stacking direction to press the plurality of ceramic sheets and the first and second inner electrodes 121 and 122 formed on the ceramic sheets to form a stack.

Next, the stacked body is cut into chips for each region corresponding to one capacitor.

Next, the chip-stacked body is fired at a high temperature to complete a ceramic body 110 in which a plurality of first and second internal electrodes 121 and 122 are alternately exposed through both end faces of the ceramic body 110 do.

Next, a conductive paste including copper (Cu) or the like is applied and fired at both ends of the ceramic body 110 so as to be electrically connected to the exposed portions of the first and second internal electrodes 121 and 122, respectively The first and second external electrodes 131 and 132 are formed to extend from both end faces of the ceramic body 110 to a part of the mounting face as shown in FIG.

Next, as shown in FIG. 3B, a conductive resin paste is applied to the mounting surface of the ceramic body 110 so as to cover the exposed portions of the first and second external electrodes 131 and 132, Conductive resin layers 151 and 152 are formed.

The conductive resin paste may be copper-epoxy, but the present invention is not limited thereto.

Next, as shown in FIG. 3C, the first and second conductive resin layers 151 and 152 are electroplated to form first and second plating layers 161 and 162, Thereby forming an electrode.

The first and second bump electrodes may preferably be formed to a thickness of 50 탆 or more, but the present invention is not limited thereto.

The first and second plating layers 161 and 162 may be formed, for example, by electroplating nickel on the first and second conductive resin layers 151 and 152 and then electroplating tin.

As another example, the first and second plating layers 161 and 162 may be formed by electroplating copper on the first and second conductive resin layers 151 and 152, followed by electroplating nickel, It can be formed by electroplating.

4 is a side sectional view schematically showing a mounting substrate of a multilayer ceramic capacitor according to a first embodiment of the present invention.

4, the mounting substrate 200 of the multilayer ceramic capacitor 100 according to the present embodiment includes a substrate 210 on which the multilayer ceramic capacitor 100 is mounted, And includes first and second electrode pads 221 and 222.

The first and second bump electrodes formed on the lower surface of the ceramic body 110 on which the ceramic body 110 is mounted are placed in contact with the first and second electrode pads 221 and 222 of the substrate 210, And may be electrically connected to the substrate 210 by solders 231 and 232.

In this case, when tin is plated on the surface of the first and second bump electrodes, tin components formed on the surfaces of the first and second bump electrodes when the multilayer ceramic capacitor 100 is mounted on the substrate 210 And may be bonded to the first and second electrode pads 221 and 222 while melting.

If voltages having different polarities are applied to the first and second external electrodes 131 and 132 formed at both ends of the multilayer ceramic capacitor 100 in a state where the multilayer ceramic capacitor 100 is mounted on the substrate 210, The ceramic body 110 expands and contracts in the thickness direction due to the inverse piezoelectric effect of the dielectric layer 111 and both ends of the first and second external electrodes 131 and 132 are subjected to the Poisson effect Contraction and expansion are caused by the Poisson effect, contrary to the expansion and contraction of the ceramic body 110 in the thickness direction.

Such contraction and expansion cause vibration. In addition, the vibration is transmitted from the first and second external electrodes 131 and 132 to the substrate 210, so that sound is radiated from the substrate 210 to become acoustic noise.

According to the present embodiment, the piezoelectric vibrations transmitted to the substrate through the first and second external electrodes 131 and 132 of the multilayer ceramic capacitor 100 are absorbed by using the elasticity of the first and second bump electrodes, Acoustic noise can be reduced.

The ceramic body 110 is electrically connected to the first and second electrode pads 221 and 222 of the substrate 210 by the first and second bump electrodes, As shown in FIG.

According to this embodiment, unlike the conventional multilayer ceramic capacitor, even when the solders 231 and 232 are used, the solder 231 and 232 can be mounted on the mounting surface of the first and second bump electrodes at least As shown in FIG.

Therefore, in the multilayer ceramic capacitor 100 of the present embodiment, the elastic force of the first and second bump electrodes efficiently works while the heights of the solders 231 and 232 are minimized, and the multilayer ceramic capacitor 100 The acoustic noise can be reduced by reducing the transmission of the generated vibration to the substrate 210.

On the other hand, in recent years, due to miniaturization and thinning of electronic products, miniaturization of substrates has progressed, and high-density packaging of electronic components has been demanded.

Particularly, the general-purpose passive components have a larger mounting area than the conventional passive components.

According to this embodiment, the mounting surface of the external electrode can be formed on one surface in the thickness direction in which the displacement of the ceramic body is small and the vibration is not transmitted well, thereby reducing the area of the mounting portion.

Further, even if the solder is not used on the peripheral surface of the external electrode by the bump electrode, the volume of the land pattern formed on the substrate is reduced by minimizing the volume of the solder, so that the mechanical strength High-density mounting can be performed without damaging the semiconductor device.

Further, even when a plurality of multilayer ceramic capacitors are mounted on the substrate at a narrow pitch, there is no solder bridge connecting the multilayer ceramic capacitors, thereby improving the reliability of the components.

On the other hand, if the length of the bump electrode is equal to the width of the ceramic body, the solder may flow to the back of the bump electrode when mounted on the substrate, and the solder may be prevented from spreading uniformly over the entire outer electrode.

5, the length of the first and second bump electrodes may be shorter than the width of the ceramic body 110, if necessary.

In this case, a space for allowing solder to flow in the stepped portion of the bump electrode is provided, and the effect that the solder uniformly spreads over the entire outer electrode can be expected.

When the solder uniformly spreads over the entire outer electrode, the height of the solder formed in the longitudinal direction of the conventional ceramic body 110 can be lowered, and when the height of the solder is lowered, the acoustic noise is reduced .

6 is a perspective view schematically showing a multilayer ceramic capacitor according to a second embodiment of the present invention with its mounting surface facing upward.

The structure in which the ceramic body 110, the first and second internal electrodes 121 and 122 and the first and second external electrodes 131 and 132 are formed is similar to the previously described embodiment, And the first and second insulating layers 171 and 172 having a structure different from that of the above-described embodiments will be specifically described.

6, the multilayer ceramic capacitor 100 'according to the present embodiment includes first and second external electrodes 131 and 132 at both ends of the ceramic body 110 so as to cover a part of the first and second external electrodes 131 and 132, 2 insulating layers 171 and 172 may be formed.

The first and second insulating layers 171 and 172 may be made of a material such as a nonconductive insulating resin, and preferably an epoxy resist. However, the present invention is not limited thereto.

The first and second insulating layers 171 and 172 may be made of the same material as the non-conductive insulating resin, and may preferably be made of an epoxy, a phenol-based thermosetting resin, a polypropylene, an acrylic thermoplastic resin, The present invention is not limited thereto.

The first and second insulating layers 171 and 172 are formed on the peripheral surface of the ceramic body 110 and the peripheral surfaces of the first and second external electrodes 131 and 132 when the multilayer ceramic capacitor 100 ' It is possible to suppress the formation of solder on the surface.

In addition, when a plurality of chips are mounted on a narrow substrate, it is possible to prevent a short circuit from occurring even when the mounted chips are in contact with each other, thereby enhancing the circuit stability of the entire product.

FIG. 7 is a perspective view schematically showing a multilayer ceramic capacitor according to a third embodiment of the present invention with its mounting surface facing upward, and FIG. 8 is an exploded perspective view showing an internal electrode structure of the multilayer ceramic capacitor of FIG.

Here, as for the structure of the ceramic body 310, a detailed description thereof will be omitted in order to avoid duplication of parts similar to those of the above-described one embodiment, and a description will be given of a part having a structure different from that of the above- .

7 and 8, the multilayer ceramic capacitor 300 according to the present embodiment includes a ceramic body 310, a pair of first and second external electrodes 331-334, Second internal electrodes 321 and 322, and first and second bump electrodes.

The ceramic body 310 is formed by stacking a plurality of dielectric layers 311 in the thickness direction.

The pair of first external electrodes 331 and 332 are formed on both sides of the ceramic body 310 so as to face each other and extend to a part of the mounting surface of the ceramic body 310.

The pair of second external electrodes 333 and 334 are formed on both sides of the ceramic body 310 at positions spaced apart from the first external electrodes 331 and 332 along the longitudinal direction of the ceramic body 310 And extends to a part of the mounting surface of the ceramic body 310. [

The third and fourth plating layers 341 - 344 may be formed on the first and second external electrodes 331 - 334 if necessary.

The third and fourth plating layers 341-344 include, by way of example, first and second nickel (Ni) plating layers respectively formed on the first and second external electrodes 331-334, And a first and a second tin (Sn) plating layers respectively formed on the nickel plating layer.

As another example, the third and fourth plating layers 341-344 may include first and second copper (Cu) plated layers respectively formed on the first and second external electrodes 331-334, First and second nickel (Ni) plating layers respectively formed on the second copper plating layer, and first and second tin (Sn) plating layers respectively formed on the first and second nickel plating layers.

The first and second internal electrodes 321 and 322 are disposed opposite to each other with the dielectric layer 311 interposed therebetween in the ceramic body 310.

The first internal electrode 321 is exposed through both side surfaces of the ceramic body 310 and has a pair of first lead portions 321a and 321b connected to the pair of first external electrodes 331 and 332 have.

The second internal electrode 322 is exposed through both side surfaces of the ceramic body 310 to have a pair of second lead portions 322a and 322b connected to the pair of second external electrodes 333 and 334 have.

The first bump electrode may be formed to simultaneously cover at least a portion of the pair of first and second electrodes 331 and 332 on the mounting surface of the ceramic body 310.

The second bump electrode may be formed to cover at least a portion of the pair of second external electrodes 333 and 334 on the mounting surface of the ceramic body 310 at the same time.

The first and second bump electrodes include first and second conductive resin layers 351 and 352 formed on the mounting surface of the ceramic body 310 and first and second conductive resin layers 351 and 352 on the first and second conductive resin layers 351 and 352 The first and second plating layers 361 and 362 may be formed on the first and second plating layers 361 and 362, respectively.

At this time, the first and second bumper electrodes may have a thickness of 50 mu m or more.

The first and second plating layers 361 and 362 of the first and second jump electrodes and the third and fourth plating layers 341 and 344 of the first and second external electrodes 331 and 334 are formed, May be formed by a single electroplating.

9, the lengths of the first and second bump electrodes may be shorter than the width of the ceramic body 110, if necessary.

10A to 10C are perspective views sequentially showing a method of manufacturing a multilayer ceramic capacitor according to a third embodiment of the present invention.

Here, to avoid duplication, a detailed description thereof will be omitted, and a portion having a structure different from that of the above-described embodiment will be concretely described.

First, a plurality of ceramic sheets are prepared.

Next, the first and second internal electrodes 321 and 322 are formed by printing a conductive paste to a predetermined thickness on at least one surface of each ceramic sheet.

The first inner electrode 321 has a pair of first lead portions 321a and 321b exposed through both side surfaces of the ceramic sheet and the second inner electrode 322 has a pair of first and second lead portions 321a and 321b, And a pair of second lead portions 322a and 322b that are exposed through the first lead portions 321a and 321b and do not overlap with the first lead portions 321a and 321b.

Next, a plurality of ceramic sheets on which the first and second inner electrodes 321 and 322 are formed are laminated and pressed so that the first and second inner electrodes 321 and 322 are alternately arranged with the ceramic sheet interposed therebetween Thereby forming a laminate.

Next, the laminate is cut for each region corresponding to one capacitor and fired at a high temperature to form a pair of first lead portions 321a and 321b and second lead portions 322a and 322b in the ceramic body 310 Thereby completing the ceramic body 310 alternately exposed through both sides.

Next, a pair of first and second external electrodes 331 - 334 are formed on both sides of the ceramic body 310.

The first and second external electrodes 331-334 are formed to extend to a part of the mounting surface of the ceramic body 310. The first and second lead portions 321a and 321b and the second lead portions 322a and 322b, Respectively.

Next, a conductive resin paste is applied so as to simultaneously cover a part of the exposed mounting surfaces of the pair of first and second external electrodes 331-334, respectively, and then electroplating is performed to form the first and second bump electrodes .

11 is a side cross-sectional view schematically showing a mounting substrate of a multilayer ceramic capacitor according to a third embodiment of the present invention.

Here, to avoid duplication, a detailed description thereof will be omitted, and a portion having a structure different from that of the above-described embodiment will be concretely described.

The first and second bump electrodes formed on the bottom surface of the ceramic body 310 are placed in contact with the first and second electrode pads 221 and 222 of the substrate 210, Solders 231 and 232 may be bonded to the substrate 210 to be electrically connected.

In this case, when the tin is plated on the surface of the first and second bump electrodes, tin components formed on the surfaces of the first and second bump electrodes melt when mounted on the substrate 210, 222, < / RTI >

FIG. 12 is a perspective view schematically showing an array type multilayer ceramic capacitor according to an embodiment of the present invention, with the bump electrodes omitted, and FIG. 13 is a perspective view schematically showing an array type multilayer ceramic capacitor according to an embodiment of the present invention .

Here, to avoid duplication, a detailed description thereof will be omitted, and a portion having a structure different from that of the above-described embodiment will be concretely described.

The array type multilayer ceramic capacitor 1000 according to the present embodiment includes a ceramic body 1100, first and second external electrodes 1331-1338 formed so as to be spaced apart from each other in the longitudinal direction of the ceramic body 1100, First and second internal electrodes (not shown) and bump electrodes 1351-1354 connected to the first external electrodes 1331-1338 and first external electrodes 1331-1338, respectively.

The ceramic body 1100 may be formed by stacking a plurality of dielectric layers (not shown).

The first and second external electrodes 1331-1338 may be formed on both sides of the ceramic body 1100 so as to face each other and extend to a part of the mounting surface of the ceramic body 1100.

The first and second internal electrodes are disposed opposite to each other with the dielectric layer interposed therebetween in the ceramic body 1100 and alternately exposed through both sides of the ceramic body 1100 to form first and second external electrodes 1331-1338, respectively.

The bump electrodes 1351-1354 are formed so that a plurality of pairs of the bump electrodes 1351-1354 are spaced apart from each other in the longitudinal direction of the ceramic body 1100. The bump electrodes 1351-1354 cover portions of the first and second external electrodes formed to face each other on the mounting surface of the ceramic body 1100 .

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the scope of the present invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. And will be apparent to those skilled in the art.

100, 100 ', 300, 1000; Multilayer Ceramic Capacitors
110, 310, 1100; Ceramic bodies 111 and 311; Dielectric layer
112, 113; Cover layers 121 and 321; The first internal electrode
122, 322; The second internal electrode
131, 331, 332, 1331, 1332, 1333, 1334; The first outer electrode
132, 333, 334, 1335, 1336, 1337, 1338; The second outer electrode
141, 142, 341, 342, 343, 344; The third and fourth plated layers
151, 152, 351, 352; The first and second conductive resin layers
161, 162, 361, 362; The first and second plating layers
171, 172; The first and second insulating layers
210; Board
221, 222; The first and second electrode pads
231, 232; Solder
321a, 321b; The first lead portion
322a, 322b; The second lead portion
1351, 1352, 1352, 1354; Bump electrode

Claims (53)

  1. A ceramic body in which a plurality of dielectric layers are stacked in a thickness direction;
    A pair of first external electrodes formed on both sides of the ceramic body so as to face each other and extending to a part of a mounting surface of the ceramic body and a part of one end surface of the ceramic body;
    And a pair of first and second external electrodes formed to face each other on both sides of the ceramic body at a position spaced apart from the first external electrode and extend to a portion of the mounting surface of the ceramic body and a portion of the other end surface of the ceramic body, External electrodes;
    A plurality of first internal electrodes exposed through both side surfaces of the ceramic body with the dielectric layer interposed therebetween and having a pair of first lead portions connected to the pair of first external electrodes in the ceramic body, A plurality of second internal electrodes exposed through both side surfaces of the main body and having a pair of second lead portions connected to the pair of second external electrodes;
    A first bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover a part of the pair of first external electrodes; And
    A second bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover a part of the pair of second external electrodes; And a capacitor.
  2. The method according to claim 1,
    Wherein the first and second bump electrodes are made of a metal,
    A first and a second conductive resin layers formed on a mounting surface of the ceramic body; and first and second plating layers formed on the first and second conductive resin layers.
  3. 3. The method of claim 2,
    Wherein the first and second plating layers include first and second nickel (Ni) plating layers and first and second tin (Sn) plating layers respectively formed on the first and second nickel plating layers Multilayer Ceramic Capacitors.
  4. 3. The method of claim 2,
    Wherein the first and second plating layers comprise first and second copper (Cu) plating layers, first and second nickel (Ni) plating layers respectively formed on the first and second copper plating layers, And a first and a second tin (Sn) plating layers respectively formed on the two nickel plating layers.
  5. The method according to claim 1,
    Wherein the first and second bump electrodes have a thickness of 50 占 퐉 or more.
  6. The method according to claim 1,
    Wherein a length of the first and second bump electrodes is shorter than a width of the ceramic body.
  7. The method according to claim 1,
    Wherein the first and second external electrodes are formed on both side surfaces of the ceramic body and include first and second connection portions respectively connected to the first and second lead portions of the first and second internal electrodes, And first and second terminal portions extending from the second connecting portion to a part of the mounting surface of the ceramic body,
    And the first and second bump electrodes are formed to cover a part of the first and second terminal portions.
  8. The method according to claim 1,
    And third and fourth plating layers formed on the first and second external electrodes. ≪ RTI ID = 0.0 > 11. < / RTI >
  9. 9. The method of claim 8,
    Wherein the third and fourth plating layers include third and fourth nickel (Ni) plating layers, and third and fourth tin (Sn) plating layers respectively formed on the third and fourth nickel plating layers Multilayer Ceramic Capacitors.
  10. 9. The method of claim 8,
    Wherein said third and fourth plating layers comprise third and fourth copper (Cu) plating layers, third and fourth nickel (Ni) plating layers respectively formed on said third and fourth copper plating layers, And a third and a fourth tin (Sn) plated layer respectively formed on the fourth nickel plated layer.
  11. The method according to claim 1,
    Further comprising first and second insulating layers formed on both ends of the ceramic body to cover a portion of the first and second external electrodes.
  12. A ceramic body in which a plurality of dielectric layers are stacked in a thickness direction;
    A pair of first external electrodes formed to be opposite to each other on both sides of the ceramic body and each extending to a part of the mounting surface of the ceramic body;
    A pair of second external electrodes formed to be opposite to each other on both side surfaces of the ceramic body at a position spaced apart from the first external electrode and each extending to a part of the mounting surface of the ceramic body;
    And a pair of first lead portions which are exposed through both side surfaces of the ceramic body and connected to the pair of first external electrodes in the ceramic body so as to face each other with the dielectric layer interposed therebetween, A plurality of second internal electrodes exposed through both side surfaces of the ceramic body and having a pair of second lead portions connected to the pair of second external electrodes;
    A first bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover a part of the pair of first external electrodes; And
    A second bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover a part of the pair of second external electrodes; And a capacitor.
  13. 13. The method of claim 12,
    Wherein the first and second bump electrodes are made of a metal,
    A first and a second conductive resin layers formed on a mounting surface of the ceramic body; and first and second plating layers formed on the first and second conductive resin layers.
  14. 14. The method of claim 13,
    Wherein the first and second plating layers include first and second nickel (Ni) plating layers and first and second tin (Sn) plating layers respectively formed on the first and second nickel plating layers Multilayer Ceramic Capacitors.
  15. 14. The method of claim 13,
    Wherein the first and second plating layers comprise first and second copper (Cu) plating layers, first and second nickel (Ni) plating layers respectively formed on the first and second copper plating layers, And a first and a second tin (Sn) plating layers respectively formed on the two nickel plating layers.
  16. 13. The method of claim 12,
    Wherein the first and second bumper electrodes have a thickness of 50 占 퐉 or more.
  17. 13. The method of claim 12,
    Wherein a length of the first and second bump electrodes is shorter than a width of the ceramic body.
  18. 13. The method of claim 12,
    Wherein the first and second external electrodes are formed on both side surfaces of the ceramic body and include first and second connection portions respectively connected to the first and second lead portions of the first and second internal electrodes, And first and second terminal portions extending from the second connecting portion to a part of the mounting surface of the ceramic body,
    And the first and second bump electrodes are formed to cover a part of the first and second terminal portions.
  19. 13. The method of claim 12,
    And third and fourth plating layers formed on the first and second external electrodes. ≪ RTI ID = 0.0 > 11. < / RTI >
  20. 20. The method of claim 19,
    Wherein the third and fourth plating layers include third and fourth nickel (Ni) plating layers, and third and fourth tin (Sn) plating layers respectively formed on the third and fourth nickel plating layers Multilayer Ceramic Capacitors.
  21. 20. The method of claim 19,
    Wherein said third and fourth plating layers comprise third and fourth copper (Cu) plating layers, third and fourth nickel (Ni) plating layers respectively formed on said third and fourth copper plating layers, And a third and a fourth tin (Sn) plated layer respectively formed on the fourth nickel plated layer.
  22. A ceramic body in which a plurality of dielectric layers are stacked;
    First and second external electrodes formed on both sides of the ceramic body so as to face each other and extending to a part of the mounting surface of the ceramic body and having a plurality of pairs spaced apart in the longitudinal direction of the ceramic body;
    A plurality of first and second internal electrodes disposed opposite to each other with the dielectric layer interposed therebetween in the ceramic body and alternately exposed through both side surfaces of the ceramic body and connected to the first and second external electrodes respectively; And
    A bump electrode formed on the mounting surface of the ceramic body so as to cover a part of the first and second external electrodes facing each other at a same time and having a plurality of pairs spaced apart in the longitudinal direction of the ceramic body; Wherein the first and second electrodes are electrically connected to each other.
  23. A first internal electrode having a pair of first lead portions exposed through both sides of the ceramic sheet and a second internal electrode exposed through both sides of the ceramic sheet and having a pair of second lead portions which do not overlap with the first lead portion, Stacking a plurality of ceramic sheets each having internal electrodes formed thereon such that the first and second internal electrodes alternate with each other with the ceramic sheet interposed therebetween;
    Providing a ceramic body in which the laminate is cut and fired for each region corresponding to one capacitor so that the pair of first and second lead portions are exposed through both sides of the ceramic body;
    A pair of first external electrodes extending from both sides of the ceramic body to a part of the mounting surface of the ceramic body and a part of one end surface of the ceramic body so as to be electrically connected to the pair of first lead parts, And extending to a portion of a mounting surface of the ceramic body and a portion of the other end surface of the ceramic body at a position spaced apart from the first external electrode on both sides of the ceramic body, Forming a pair of second external electrodes to be electrically connected to each other; And
    Forming a first and a second bump electrodes by applying a conductive resin paste so as to simultaneously cover a part of the exposed mounting surfaces of the pair of first and second external electrodes, respectively, and then performing electroplating; And a step of forming the capacitor.
  24. 24. The method of claim 23,
    In the step of forming the first and second bump electrodes,
    Wherein the electroplating is performed in the order of nickel plating and tin plating.
  25. 24. The method of claim 23,
    In the step of forming the first and second bump electrodes,
    Wherein the electroplating is performed in the order of copper plating, nickel plating, and tin plating.
  26. 24. The method of claim 23,
    Wherein the first and second bumper electrodes are formed to a thickness of 50 mu m or more.
  27. 24. The method of claim 23,
    Wherein the step of electroplating the first and second outer electrodes is further performed. ≪ Desc / Clms Page number 20 >
  28. A first internal electrode having a pair of first lead portions exposed through both sides of the ceramic sheet and a second internal electrode exposed through both sides of the ceramic sheet and having a pair of second lead portions which do not overlap with the first lead portion, Stacking a plurality of ceramic sheets each having internal electrodes formed thereon such that the first and second internal electrodes alternate with each other with the ceramic sheet interposed therebetween;
    Providing a ceramic body in which the laminate is cut and fired for each region corresponding to one capacitor so that the pair of first and second lead portions are exposed through both sides of the ceramic body;
    Forming a pair of first and second external electrodes so as to extend from both sides of the ceramic body to a part of the mounting surface of the ceramic body and electrically connected to the first and second lead portions, ; And
    Forming a first and a second bump electrodes by applying a conductive resin paste so as to simultaneously cover a part of the exposed mounting surfaces of the pair of first and second external electrodes, respectively, and then performing electroplating; And a step of forming the capacitor.
  29. 29. The method of claim 28,
    In the step of forming the first and second bump electrodes,
    Wherein the electroplating is performed in the order of nickel plating and tin plating.
  30. 29. The method of claim 28,
    In the step of forming the first and second bump electrodes,
    Wherein the electroplating is performed in the order of copper plating, nickel plating, and tin plating.
  31. 29. The method of claim 28,
    Wherein the first and second bump electrodes are formed to a thickness of 50 mu m or more.
  32. 29. The method of claim 28,
    Wherein the step of electroplating the first and second outer electrodes is further performed. ≪ Desc / Clms Page number 20 >
  33. A substrate having first and second electrode pads on the top; And
    At least one multilayer ceramic capacitor disposed on the substrate; / RTI >
    The multilayer ceramic capacitor includes: a ceramic body having a plurality of dielectric layers stacked in a thickness direction; A pair of first external electrodes formed on both sides of the ceramic body so as to face each other and extending to a part of a mounting surface of the ceramic body and a part of one end surface of the ceramic body; And a pair of first and second external electrodes formed to face each other on both sides of the ceramic body at a position spaced apart from the first external electrode and extend to a portion of the mounting surface of the ceramic body and a portion of the other end surface of the ceramic body, External electrodes; A plurality of first internal electrodes exposed through both side surfaces of the ceramic body with the dielectric layer interposed therebetween and having a pair of first lead portions connected to the pair of first external electrodes in the ceramic body, A plurality of second internal electrodes exposed through both side surfaces of the main body and having a pair of second lead portions connected to the pair of second external electrodes; A first bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover a part of the pair of first external electrodes; A second bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover a part of the pair of second external electrodes; The mounting substrate of the multilayer ceramic capacitor
  34. 34. The method of claim 33,
    Wherein the first and second bump electrodes are made of a metal,
    A first and a second conductive resin layers formed on mounting surfaces of the ceramic body; and first and second plating layers formed on the first and second conductive resin layers.
  35. 35. The method of claim 34,
    Wherein the first and second plating layers include first and second nickel (Ni) plating layers and first and second tin (Sn) plating layers respectively formed on the first and second nickel plating layers A mounting substrate of a multilayer ceramic capacitor.
  36. 35. The method of claim 34,
    Wherein the first and second plating layers comprise first and second copper (Cu) plating layers, first and second nickel (Ni) plating layers respectively formed on the first and second copper plating layers, And a first and a second tin (Sn) plated layers respectively formed on the two nickel plated layers.
  37. 34. The method of claim 33,
    Wherein the first and second bump electrodes have a thickness of 50 占 퐉 or more.
  38. 34. The method of claim 33,
    Wherein a length of the first and second bump electrodes is shorter than a width of the ceramic body.
  39. 34. The method of claim 33,
    Wherein the first and second external electrodes are formed on both side surfaces of the ceramic body and include first and second connection portions respectively connected to the first and second lead portions of the first and second internal electrodes, And first and second terminal portions extending from the second connecting portion to a part of the mounting surface of the ceramic body,
    Wherein the first and second bump electrodes are formed to cover a part of the first and second terminal portions.
  40. 34. The method of claim 33,
    Further comprising third and fourth plating layers formed on the first and second external electrodes.
  41. 41. The method of claim 40,
    Wherein the third and fourth plating layers include third and fourth nickel (Ni) plating layers, and third and fourth tin (Sn) plating layers respectively formed on the third and fourth nickel plating layers A mounting substrate of a multilayer ceramic capacitor.
  42. 41. The method of claim 40,
    Wherein said third and fourth plating layers comprise third and fourth copper (Cu) plating layers, third and fourth nickel (Ni) plating layers respectively formed on said third and fourth copper plating layers, And a third and a fourth tin (Sn) plated layer respectively formed on the fourth nickel plated layer.
  43. 34. The method of claim 33,
    Further comprising first and second insulating layers formed on both ends of the ceramic body to cover a part of the first and second external electrodes.
  44. A substrate having first and second electrode pads on the top; And
    At least one multilayer ceramic capacitor disposed on the substrate; / RTI >
    The multilayer ceramic capacitor includes: a ceramic body having a plurality of dielectric layers stacked in a thickness direction; A pair of first external electrodes formed to be opposite to each other on both side surfaces of the ceramic body and each extending to a part of the mounting surface of the ceramic body; A pair of second external electrodes which are formed to face each other and extend to a part of the mounting surface of the ceramic body; And a pair of first lead portions which are exposed through both side surfaces of the ceramic body and connected to the pair of first external electrodes in the ceramic body so as to face each other with the dielectric layer interposed therebetween, A plurality of second internal electrodes exposed through both side surfaces of the ceramic body and having a pair of second lead portions connected to the pair of second external electrodes; A first bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover a part of the pair of first external electrodes; A second bump electrode formed on the mounting surface of the ceramic body so as to simultaneously cover a portion of the pair of second external electrodes; And a capacitor connected to the capacitor.
  45. 45. The method of claim 44,
    Wherein the first and second bump electrodes are made of a metal,
    A first and a second conductive resin layers formed on mounting surfaces of the ceramic body; and first and second plating layers formed on the first and second conductive resin layers.
  46. 46. The method of claim 45,
    Wherein the first and second plating layers include first and second nickel (Ni) plating layers and first and second tin (Sn) plating layers respectively formed on the first and second nickel plating layers A mounting substrate of a multilayer ceramic capacitor.
  47. 46. The method of claim 45,
    Wherein the first and second plating layers comprise first and second copper (Cu) plating layers, first and second nickel (Ni) plating layers respectively formed on the first and second copper plating layers, And a first and a second tin (Sn) plated layers respectively formed on the two nickel plated layers.
  48. 45. The method of claim 44,
    Wherein the first and second bumper electrodes have a thickness of 50 占 퐉 or more.
  49. 45. The method of claim 44,
    Wherein a length of the first and second bump electrodes is shorter than a width of the ceramic body.
  50. 45. The method of claim 44,
    Wherein the first and second external electrodes are formed on both end faces of the ceramic body and have first and second connection portions respectively connected to the first and second internal electrodes, The first and second terminal portions being formed to extend to a portion of the mounting surface of the semiconductor device,
    Wherein the first and second bump electrodes are formed to cover a part of the first and second terminal portions.
  51. 45. The method of claim 44,
    Further comprising third and fourth plating layers formed on the first and second external electrodes.
  52. 52. The method of claim 51,
    Wherein the third and fourth plating layers include third and fourth nickel (Ni) plating layers, and third and fourth tin (Sn) plating layers respectively formed on the third and fourth nickel plating layers A mounting substrate of a multilayer ceramic capacitor.
  53. 52. The method of claim 51,
    Wherein said third and fourth plating layers comprise third and fourth copper (Cu) plating layers, third and fourth nickel (Ni) plating layers respectively formed on said third and fourth copper plating layers, And a third and a fourth tin (Sn) plated layer respectively formed on the fourth nickel plated layer.
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