KR101574138B1 - Ｓｏｉ 기판의 제조방법 - Google Patents

Ｓｏｉ 기판의 제조방법 Download PDF

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Publication number
KR101574138B1
KR101574138B1 KR1020117000383A KR20117000383A KR101574138B1 KR 101574138 B1 KR101574138 B1 KR 101574138B1 KR 1020117000383 A KR1020117000383 A KR 1020117000383A KR 20117000383 A KR20117000383 A KR 20117000383A KR 101574138 B1 KR101574138 B1 KR 101574138B1
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South Korea
Prior art keywords
oxide film
substrate
nitrogen
semiconductor
base substrate
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Expired - Fee Related
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KR1020117000383A
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English (en)
Korean (ko)
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KR20110022663A (ko
Inventor
히데토 오누마
켄이치로 마키노
요이치 이이쿠보
마사하루 나가이
아이코 시가
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가부시키가이샤 한도오따이 에네루기 켄큐쇼
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Publication of KR20110022663A publication Critical patent/KR20110022663A/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Recrystallisation Techniques (AREA)
  • Electroluminescent Light Sources (AREA)
KR1020117000383A 2008-06-25 2009-06-12 Ｓｏｉ 기판의 제조방법 Expired - Fee Related KR101574138B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2008166447 2008-06-25
JPJP-P-2008-166447 2008-06-25

Publications (2)

Publication Number Publication Date
KR20110022663A KR20110022663A (ko) 2011-03-07
KR101574138B1 true KR101574138B1 (ko) 2015-12-03

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KR1020117000383A Expired - Fee Related KR101574138B1 (ko) 2008-06-25 2009-06-12 Ｓｏｉ 기판의 제조방법

Country Status (5)

Country Link
US (2) US7829432B2 (enExample)
JP (1) JP5548395B2 (enExample)
KR (1) KR101574138B1 (enExample)
TW (1) TWI538111B (enExample)
WO (1) WO2009157369A1 (enExample)

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JP5663150B2 (ja) * 2008-07-22 2015-02-04 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
JP5760298B2 (ja) * 2009-05-21 2015-08-05 ソニー株式会社 薄膜トランジスタ、表示装置、および電子機器
JP2011077504A (ja) * 2009-09-02 2011-04-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US20110147817A1 (en) * 2009-12-17 2011-06-23 Infineon Technologies Austria Ag Semiconductor component having an oxide layer
US8884282B2 (en) * 2010-04-02 2014-11-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP5917036B2 (ja) 2010-08-05 2016-05-11 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
US20120045883A1 (en) * 2010-08-23 2012-02-23 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate
JP2014516470A (ja) 2011-04-08 2014-07-10 エーファウ・グループ・エー・タルナー・ゲーエムベーハー ウェハを恒久的にボンディングするための方法
JP2014096454A (ja) * 2012-11-08 2014-05-22 Tokyo Electron Ltd 有機半導体素子の製造方法、絶縁膜の形成方法、及び溶液
JP5780234B2 (ja) 2012-12-14 2015-09-16 信越半導体株式会社 Ｓｏｉウェーハの製造方法
EP3155656A4 (en) * 2014-06-13 2018-02-14 Intel Corporation Surface encapsulation for wafer bonding
JP6471650B2 (ja) * 2015-08-27 2019-02-20 株式会社Sumco Ｓｏｉウェーハの製造方法およびｓｏｉウェーハ
JP6524862B2 (ja) 2015-08-27 2019-06-05 株式会社Sumco Ｓｏｉウェーハの製造方法およびｓｏｉウェーハ
CN106601615B (zh) * 2016-12-27 2020-05-15 上海新傲科技股份有限公司 提高键合强度的退火方法
CN117038572A (zh) * 2017-07-14 2023-11-10 太阳能爱迪生半导体有限公司 绝缘体上半导体结构的制造方法
US10686037B2 (en) 2018-07-19 2020-06-16 Vanguard International Semiconductor Corporation Semiconductor structure with insulating substrate and fabricating method thereof
TWI692874B (zh) * 2018-09-17 2020-05-01 世界先進積體電路股份有限公司 半導體結構以及製造方法
JP2024165393A (ja) * 2023-05-17 2024-11-28 信越半導体株式会社 接合基板の製造方法および半導体装置の製造方法

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Also Published As

Publication number Publication date
US20090325363A1 (en) 2009-12-31
WO2009157369A1 (en) 2009-12-30
KR20110022663A (ko) 2011-03-07
JP2010034523A (ja) 2010-02-12
US20110039395A1 (en) 2011-02-17
TWI538111B (zh) 2016-06-11
US8198173B2 (en) 2012-06-12
JP5548395B2 (ja) 2014-07-16
TW201001630A (en) 2010-01-01
US7829432B2 (en) 2010-11-09

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