TWI538111B - Soi基板的製造方法 - Google Patents
Soi基板的製造方法 Download PDFInfo
- Publication number
- TWI538111B TWI538111B TW098121197A TW98121197A TWI538111B TW I538111 B TWI538111 B TW I538111B TW 098121197 A TW098121197 A TW 098121197A TW 98121197 A TW98121197 A TW 98121197A TW I538111 B TWI538111 B TW I538111B
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- oxide film
- nitrogen
- semiconductor
- support substrate
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
- H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
- Electroluminescent Light Sources (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008166447 | 2008-06-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201001630A TW201001630A (en) | 2010-01-01 |
| TWI538111B true TWI538111B (zh) | 2016-06-11 |
Family
ID=41444437
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW098121197A TWI538111B (zh) | 2008-06-25 | 2009-06-24 | Soi基板的製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US7829432B2 (enExample) |
| JP (1) | JP5548395B2 (enExample) |
| KR (1) | KR101574138B1 (enExample) |
| TW (1) | TWI538111B (enExample) |
| WO (1) | WO2009157369A1 (enExample) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7939389B2 (en) | 2008-04-18 | 2011-05-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| US8182633B2 (en) * | 2008-04-29 | 2012-05-22 | Samsung Electronics Co., Ltd. | Method of fabricating a flexible display device |
| JP5663150B2 (ja) * | 2008-07-22 | 2015-02-04 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
| JP5760298B2 (ja) * | 2009-05-21 | 2015-08-05 | ソニー株式会社 | 薄膜トランジスタ、表示装置、および電子機器 |
| JP2011077504A (ja) * | 2009-09-02 | 2011-04-14 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| US20110147817A1 (en) * | 2009-12-17 | 2011-06-23 | Infineon Technologies Austria Ag | Semiconductor component having an oxide layer |
| US8884282B2 (en) * | 2010-04-02 | 2014-11-11 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP5917036B2 (ja) | 2010-08-05 | 2016-05-11 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
| US20120045883A1 (en) * | 2010-08-23 | 2012-02-23 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing soi substrate |
| CN103477420B (zh) | 2011-04-08 | 2016-11-16 | Ev集团E·索尔纳有限责任公司 | 永久性粘合晶片的方法 |
| JP2014096454A (ja) * | 2012-11-08 | 2014-05-22 | Tokyo Electron Ltd | 有機半導体素子の製造方法、絶縁膜の形成方法、及び溶液 |
| JP5780234B2 (ja) | 2012-12-14 | 2015-09-16 | 信越半導体株式会社 | Soiウェーハの製造方法 |
| US20170062569A1 (en) * | 2014-06-13 | 2017-03-02 | Intel Corporation | Surface encapsulation for wafer bonding |
| JP6471650B2 (ja) * | 2015-08-27 | 2019-02-20 | 株式会社Sumco | Soiウェーハの製造方法およびsoiウェーハ |
| JP6524862B2 (ja) | 2015-08-27 | 2019-06-05 | 株式会社Sumco | Soiウェーハの製造方法およびsoiウェーハ |
| CN106601615B (zh) * | 2016-12-27 | 2020-05-15 | 上海新傲科技股份有限公司 | 提高键合强度的退火方法 |
| CN117038572A (zh) * | 2017-07-14 | 2023-11-10 | 太阳能爱迪生半导体有限公司 | 绝缘体上半导体结构的制造方法 |
| US10686037B2 (en) | 2018-07-19 | 2020-06-16 | Vanguard International Semiconductor Corporation | Semiconductor structure with insulating substrate and fabricating method thereof |
| TWI692874B (zh) * | 2018-09-17 | 2020-05-01 | 世界先進積體電路股份有限公司 | 半導體結構以及製造方法 |
| JP2024165393A (ja) * | 2023-05-17 | 2024-11-28 | 信越半導体株式会社 | 接合基板の製造方法および半導体装置の製造方法 |
Family Cites Families (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0254532A (ja) * | 1988-08-17 | 1990-02-23 | Sony Corp | Soi基板の製造方法 |
| US6534380B1 (en) | 1997-07-18 | 2003-03-18 | Denso Corporation | Semiconductor substrate and method of manufacturing the same |
| JPH1197379A (ja) * | 1997-07-25 | 1999-04-09 | Denso Corp | 半導体基板及び半導体基板の製造方法 |
| JP2000124092A (ja) | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
| US20010053559A1 (en) | 2000-01-25 | 2001-12-20 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating display device |
| JP2002076336A (ja) | 2000-09-01 | 2002-03-15 | Mitsubishi Electric Corp | 半導体装置およびsoi基板 |
| FR2817394B1 (fr) * | 2000-11-27 | 2003-10-31 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede |
| US6583440B2 (en) | 2000-11-30 | 2003-06-24 | Seiko Epson Corporation | Soi substrate, element substrate, semiconductor device, electro-optical apparatus, electronic equipment, method of manufacturing the soi substrate, method of manufacturing the element substrate, and method of manufacturing the electro-optical apparatus |
| JP4507395B2 (ja) * | 2000-11-30 | 2010-07-21 | セイコーエプソン株式会社 | 電気光学装置用素子基板の製造方法 |
| US7119365B2 (en) | 2002-03-26 | 2006-10-10 | Sharp Kabushiki Kaisha | Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate |
| JP2004119636A (ja) * | 2002-09-25 | 2004-04-15 | Sharp Corp | 半導体装置およびその製造方法 |
| JP4328067B2 (ja) | 2002-07-31 | 2009-09-09 | アプライド マテリアルズ インコーポレイテッド | イオン注入方法及びsoiウエハの製造方法、並びにイオン注入装置 |
| JP4689168B2 (ja) * | 2003-01-22 | 2011-05-25 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US20060014363A1 (en) * | 2004-03-05 | 2006-01-19 | Nicolas Daval | Thermal treatment of a semiconductor layer |
| US7410882B2 (en) | 2004-09-28 | 2008-08-12 | Palo Alto Research Center Incorporated | Method of manufacturing and structure of polycrystalline semiconductor thin-film heterostructures on dissimilar substrates |
| US7148124B1 (en) | 2004-11-18 | 2006-12-12 | Alexander Yuri Usenko | Method for forming a fragile layer inside of a single crystalline substrate preferably for making silicon-on-insulator wafers |
| JP4903153B2 (ja) * | 2004-11-20 | 2012-03-28 | イグゼティック エムアーツェー ゲゼルシャフト ミット ベシュレンクテル ハフツング | アキシャルピストン機械 |
| JP5128761B2 (ja) * | 2005-05-19 | 2013-01-23 | 信越化学工業株式会社 | Soiウエーハの製造方法 |
| FR2888663B1 (fr) | 2005-07-13 | 2008-04-18 | Soitec Silicon On Insulator | Procede de diminution de la rugosite d'une couche epaisse d'isolant |
| WO2007014320A2 (en) * | 2005-07-27 | 2007-02-01 | Silicon Genesis Corporation | Method and structure for fabricating multiple tile regions onto a plate using a controlled cleaving process |
| US7674687B2 (en) | 2005-07-27 | 2010-03-09 | Silicon Genesis Corporation | Method and structure for fabricating multiple tiled regions onto a plate using a controlled cleaving process |
| US7268051B2 (en) * | 2005-08-26 | 2007-09-11 | Corning Incorporated | Semiconductor on glass insulator with deposited barrier layer |
| WO2007074551A1 (ja) | 2005-12-27 | 2007-07-05 | Shin-Etsu Chemical Co., Ltd. | Soiウェーハの製造方法及びsoiウェーハ |
| FR2896619B1 (fr) * | 2006-01-23 | 2008-05-23 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat composite a proprietes electriques ameliorees |
| JP2007227415A (ja) * | 2006-02-21 | 2007-09-06 | Shin Etsu Chem Co Ltd | 貼り合わせ基板の製造方法および貼り合わせ基板 |
| US7902080B2 (en) * | 2006-05-30 | 2011-03-08 | Applied Materials, Inc. | Deposition-plasma cure cycle process to enhance film quality of silicon dioxide |
| US20070281440A1 (en) * | 2006-05-31 | 2007-12-06 | Jeffrey Scott Cites | Producing SOI structure using ion shower |
| US8153513B2 (en) | 2006-07-25 | 2012-04-10 | Silicon Genesis Corporation | Method and system for continuous large-area scanning implantation process |
| CN101529578B (zh) * | 2006-10-27 | 2012-01-11 | 硅绝缘体技术有限公司 | 用于转移在具有空位团的基片中形成的薄层的改进方法 |
| EP1986230A2 (en) * | 2007-04-25 | 2008-10-29 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing SOI substrate and method of manufacturing semiconductor device |
| US7763502B2 (en) | 2007-06-22 | 2010-07-27 | Semiconductor Energy Laboratory Co., Ltd | Semiconductor substrate, method for manufacturing semiconductor substrate, semiconductor device, and electronic device |
| KR101484296B1 (ko) | 2007-06-26 | 2015-01-19 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 기판의 제작방법 |
| EP2009687B1 (en) | 2007-06-29 | 2016-08-17 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing an SOI substrate and method of manufacturing a semiconductor device |
| JP5367330B2 (ja) | 2007-09-14 | 2013-12-11 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法及び半導体装置の作製方法 |
| TWI437696B (zh) | 2007-09-21 | 2014-05-11 | 半導體能源研究所股份有限公司 | 半導體裝置及其製造方法 |
| US8236668B2 (en) | 2007-10-10 | 2012-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| JP5522917B2 (ja) | 2007-10-10 | 2014-06-18 | 株式会社半導体エネルギー研究所 | Soi基板の製造方法 |
| US7696058B2 (en) | 2007-10-31 | 2010-04-13 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
-
2009
- 2009-06-11 JP JP2009139952A patent/JP5548395B2/ja not_active Expired - Fee Related
- 2009-06-12 KR KR1020117000383A patent/KR101574138B1/ko not_active Expired - Fee Related
- 2009-06-12 WO PCT/JP2009/061149 patent/WO2009157369A1/en not_active Ceased
- 2009-06-23 US US12/489,594 patent/US7829432B2/en not_active Expired - Fee Related
- 2009-06-24 TW TW098121197A patent/TWI538111B/zh not_active IP Right Cessation
-
2010
- 2010-10-22 US US12/910,320 patent/US8198173B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US8198173B2 (en) | 2012-06-12 |
| KR20110022663A (ko) | 2011-03-07 |
| US7829432B2 (en) | 2010-11-09 |
| US20110039395A1 (en) | 2011-02-17 |
| WO2009157369A1 (en) | 2009-12-30 |
| JP5548395B2 (ja) | 2014-07-16 |
| US20090325363A1 (en) | 2009-12-31 |
| TW201001630A (en) | 2010-01-01 |
| KR101574138B1 (ko) | 2015-12-03 |
| JP2010034523A (ja) | 2010-02-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |