KR101454884B1 - 적층된 집적회로 패키지 인 패키지 시스템 - Google Patents

적층된 집적회로 패키지 인 패키지 시스템 Download PDF

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KR101454884B1
KR101454884B1 KR1020070127172A KR20070127172A KR101454884B1 KR 101454884 B1 KR101454884 B1 KR 101454884B1 KR 1020070127172 A KR1020070127172 A KR 1020070127172A KR 20070127172 A KR20070127172 A KR 20070127172A KR 101454884 B1 KR101454884 B1 KR 101454884B1
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South Korea
Prior art keywords
terminal
package
integrated circuit
rti
capsule
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KR1020070127172A
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Korean (ko)
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KR20080053234A (ko
Inventor
김오석
하종우
주종욱
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스태츠 칩팩 엘티디
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Assigned to 주식회사 한국씨티은행 reassignment 주식회사 한국씨티은행 근질권설정등록 Assignors: 스태츠 칩팩 피티이. 엘티디.
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/121Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07521Aligning
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07541Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07553Controlling the environment, e.g. atmosphere composition or temperature changes in shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/537Multiple bond wires having different shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5434Dispositions of bond wires the connected ends being on auxiliary connecting means on bond pads, e.g. on other bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/20Configurations of stacked chips
    • H10W90/24Configurations of stacked chips at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/20Configurations of stacked chips
    • H10W90/288Configurations of stacked chips characterised by arrangements for thermal management of the stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1020070127172A 2006-12-09 2007-12-07 적층된 집적회로 패키지 인 패키지 시스템 Active KR101454884B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/608,829 2006-12-09
US11/608,829 US7635913B2 (en) 2006-12-09 2006-12-09 Stacked integrated circuit package-in-package system

Publications (2)

Publication Number Publication Date
KR20080053234A KR20080053234A (ko) 2008-06-12
KR101454884B1 true KR101454884B1 (ko) 2014-10-27

Family

ID=39497001

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070127172A Active KR101454884B1 (ko) 2006-12-09 2007-12-07 적층된 집적회로 패키지 인 패키지 시스템

Country Status (4)

Country Link
US (2) US7635913B2 (https=)
JP (1) JP4900829B2 (https=)
KR (1) KR101454884B1 (https=)
TW (1) TWI345299B (https=)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100618892B1 (ko) * 2005-04-13 2006-09-01 삼성전자주식회사 와이어 본딩을 통해 팬 아웃 구조를 달성하는 반도체패키지
US7746656B2 (en) * 2005-05-16 2010-06-29 Stats Chippac Ltd. Offset integrated circuit package-on-package stacking system
US7518224B2 (en) * 2005-05-16 2009-04-14 Stats Chippac Ltd. Offset integrated circuit package-on-package stacking system
SG130055A1 (en) * 2005-08-19 2007-03-20 Micron Technology Inc Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices
US8432026B2 (en) * 2006-08-04 2013-04-30 Stats Chippac Ltd. Stackable multi-chip package system
US7622333B2 (en) * 2006-08-04 2009-11-24 Stats Chippac Ltd. Integrated circuit package system for package stacking and manufacturing method thereof
US7645638B2 (en) * 2006-08-04 2010-01-12 Stats Chippac Ltd. Stackable multi-chip package system with support structure
US8642383B2 (en) * 2006-09-28 2014-02-04 Stats Chippac Ltd. Dual-die package structure having dies externally and simultaneously connected via bump electrodes and bond wires
US7608921B2 (en) * 2006-12-07 2009-10-27 Stats Chippac, Inc. Multi-layer semiconductor package
US7759783B2 (en) * 2006-12-07 2010-07-20 Stats Chippac Ltd. Integrated circuit package system employing thin profile techniques
US8304874B2 (en) * 2006-12-09 2012-11-06 Stats Chippac Ltd. Stackable integrated circuit package system
US8163600B2 (en) * 2006-12-28 2012-04-24 Stats Chippac Ltd. Bridge stack integrated circuit package-on-package system
US7872340B2 (en) * 2007-08-31 2011-01-18 Stats Chippac Ltd. Integrated circuit package system employing an offset stacked configuration
US7683469B2 (en) * 2008-05-30 2010-03-23 Stats Chippac Ltd. Package-on-package system with heat spreader
KR20100049283A (ko) * 2008-11-03 2010-05-12 삼성전자주식회사 반도체 패키지 및 그 제조 방법
US8487420B1 (en) * 2008-12-08 2013-07-16 Amkor Technology, Inc. Package in package semiconductor device with film over wire
US7785925B2 (en) * 2008-12-19 2010-08-31 Stats Chippac Ltd. Integrated circuit packaging system with package stacking and method of manufacture thereof
US9355962B2 (en) 2009-06-12 2016-05-31 Stats Chippac Ltd. Integrated circuit package stacking system with redistribution and method of manufacture thereof
US8080867B2 (en) * 2009-10-29 2011-12-20 Stats Chippac Ltd. Integrated circuit packaging system with stacked integrated circuit and method of manufacture thereof
KR101686553B1 (ko) 2010-07-12 2016-12-14 삼성전자 주식회사 반도체 패키지 및 패키지 온 패키지
KR20120110451A (ko) 2011-03-29 2012-10-10 삼성전자주식회사 반도체 패키지
CN103474421B (zh) 2013-08-30 2016-10-12 晟碟信息科技(上海)有限公司 高产量半导体装置
TWI602267B (zh) * 2014-06-13 2017-10-11 矽品精密工業股份有限公司 封裝結構及其製法
KR20160116923A (ko) 2015-03-31 2016-10-10 동우 화인켐 주식회사 대전방지 하드코팅 조성물 및 이를 이용한 광학 시트
US9871007B2 (en) * 2015-09-25 2018-01-16 Intel Corporation Packaged integrated circuit device with cantilever structure
KR102649471B1 (ko) 2016-09-05 2024-03-21 삼성전자주식회사 반도체 패키지 및 그의 제조 방법
KR102556518B1 (ko) * 2018-10-18 2023-07-18 에스케이하이닉스 주식회사 상부 칩 스택을 지지하는 서포팅 블록을 포함하는 반도체 패키지
KR102767617B1 (ko) * 2019-08-12 2025-02-17 에스케이하이닉스 주식회사 적층 반도체 칩을 포함하는 반도체 패키지
TWI744869B (zh) * 2020-04-20 2021-11-01 力成科技股份有限公司 封裝結構及其製造方法
JP2022094390A (ja) * 2020-12-15 2022-06-27 Tdk株式会社 電子回路モジュール及びその製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002009235A (ja) * 2000-06-23 2002-01-11 Mitsubishi Electric Corp 半導体装置およびその製造方法、ならびに該半導体装置を基板に接続するためのコネクタ、ならびに該半導体装置を基板に接続する方法
JP2006216776A (ja) * 2005-02-03 2006-08-17 Fujitsu Ltd 樹脂封止型半導体装置

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05144982A (ja) * 1991-11-19 1993-06-11 Nippon Precision Circuits Kk 集積回路装置
US5679978A (en) * 1993-12-06 1997-10-21 Fujitsu Limited Semiconductor device having resin gate hole through substrate for resin encapsulation
US5998864A (en) * 1995-05-26 1999-12-07 Formfactor, Inc. Stacking semiconductor devices, particularly memory chips
US6072239A (en) * 1995-11-08 2000-06-06 Fujitsu Limited Device having resin package with projections
JPH11312749A (ja) * 1998-02-25 1999-11-09 Fujitsu Ltd 半導体装置及びその製造方法及びリードフレームの製造方法
JP3461720B2 (ja) * 1998-04-20 2003-10-27 松下電器産業株式会社 樹脂封止型半導体装置
US5854507A (en) * 1998-07-21 1998-12-29 Hewlett-Packard Company Multiple chip assembly
US6552437B1 (en) * 1998-10-14 2003-04-22 Hitachi, Ltd. Semiconductor device and method of manufacture thereof
KR100319608B1 (ko) * 1999-03-09 2002-01-05 김영환 적층형 반도체 패키지 및 그 제조방법
JP3798597B2 (ja) * 1999-11-30 2006-07-19 富士通株式会社 半導体装置
US6605875B2 (en) * 1999-12-30 2003-08-12 Intel Corporation Integrated circuit die having bond pads near adjacent sides to allow stacking of dice without regard to dice size
US6414396B1 (en) * 2000-01-24 2002-07-02 Amkor Technology, Inc. Package for stacked integrated circuits
JP3813788B2 (ja) * 2000-04-14 2006-08-23 株式会社ルネサステクノロジ 半導体装置及びその製造方法
US6424031B1 (en) * 2000-05-08 2002-07-23 Amkor Technology, Inc. Stackable package with heat sink
JP2002033441A (ja) * 2000-07-14 2002-01-31 Mitsubishi Electric Corp 半導体装置
US20020033527A1 (en) * 2000-09-19 2002-03-21 Siliconware Precision Industries Co., Ltd. Semiconductor device and manufacturing process thereof
SG97938A1 (en) * 2000-09-21 2003-08-20 Micron Technology Inc Method to prevent die attach adhesive contamination in stacked chips
TW461064B (en) * 2000-12-26 2001-10-21 Siliconware Precision Industries Co Ltd Thin-type semiconductor device having heat sink structure
JP2002231885A (ja) * 2001-02-06 2002-08-16 Mitsubishi Electric Corp 半導体装置
JP2002231882A (ja) * 2001-02-06 2002-08-16 Mitsubishi Electric Corp 半導体装置
KR100369907B1 (ko) * 2001-02-12 2003-01-30 삼성전자 주식회사 반도체 패키지와 그 반도체 패키지의 기판 실장 구조 및적층 구조
US7196415B2 (en) * 2002-03-22 2007-03-27 Broadcom Corporation Low voltage drop and high thermal performance ball grid array package
US7071547B2 (en) * 2002-09-11 2006-07-04 Tessera, Inc. Assemblies having stacked semiconductor chips and methods of making same
KR100480437B1 (ko) * 2002-10-24 2005-04-07 삼성전자주식회사 반도체 칩 패키지 적층 모듈
US6686656B1 (en) * 2003-01-13 2004-02-03 Kingston Technology Corporation Integrated multi-chip chip scale package
US20050067694A1 (en) * 2003-09-30 2005-03-31 Pon Florence R. Spacerless die stacking
KR100510556B1 (ko) * 2003-11-11 2005-08-26 삼성전자주식회사 초박형 반도체 패키지 및 그 제조방법
JP2005302815A (ja) * 2004-04-07 2005-10-27 Toshiba Corp 積層型半導体パッケージおよびその製造方法
JP2005317862A (ja) * 2004-04-30 2005-11-10 Shinko Electric Ind Co Ltd 半導体素子の接続構造
US7116002B2 (en) * 2004-05-10 2006-10-03 Taiwan Semiconductor Manufacturing Company, Ltd. Overhang support for a stacked semiconductor device, and method of forming thereof
US7271496B2 (en) * 2005-02-04 2007-09-18 Stats Chippac Ltd. Integrated circuit package-in-package system
US7288835B2 (en) * 2006-03-17 2007-10-30 Stats Chippac Ltd. Integrated circuit package-in-package system
US9202776B2 (en) * 2006-06-01 2015-12-01 Stats Chippac Ltd. Stackable multi-chip package system
US7622333B2 (en) * 2006-08-04 2009-11-24 Stats Chippac Ltd. Integrated circuit package system for package stacking and manufacturing method thereof
US7645638B2 (en) * 2006-08-04 2010-01-12 Stats Chippac Ltd. Stackable multi-chip package system with support structure
US7723833B2 (en) * 2006-08-30 2010-05-25 United Test And Assembly Center Ltd. Stacked die packages
US7683467B2 (en) * 2006-12-07 2010-03-23 Stats Chippac Ltd. Integrated circuit package system employing structural support
US8304874B2 (en) * 2006-12-09 2012-11-06 Stats Chippac Ltd. Stackable integrated circuit package system
US7772683B2 (en) * 2006-12-09 2010-08-10 Stats Chippac Ltd. Stacked integrated circuit package-in-package system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002009235A (ja) * 2000-06-23 2002-01-11 Mitsubishi Electric Corp 半導体装置およびその製造方法、ならびに該半導体装置を基板に接続するためのコネクタ、ならびに該半導体装置を基板に接続する方法
JP2006216776A (ja) * 2005-02-03 2006-08-17 Fujitsu Ltd 樹脂封止型半導体装置

Also Published As

Publication number Publication date
KR20080053234A (ko) 2008-06-12
US8617924B2 (en) 2013-12-31
US20080136007A1 (en) 2008-06-12
US20100044849A1 (en) 2010-02-25
US7635913B2 (en) 2009-12-22
TW200832671A (en) 2008-08-01
TWI345299B (en) 2011-07-11
JP4900829B2 (ja) 2012-03-21
JP2008147670A (ja) 2008-06-26

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