KR101432150B1 - 실리콘을 함유하는 에피택셜 층들의 형성 - Google Patents

실리콘을 함유하는 에피택셜 층들의 형성 Download PDF

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KR101432150B1
KR101432150B1 KR1020097013965A KR20097013965A KR101432150B1 KR 101432150 B1 KR101432150 B1 KR 101432150B1 KR 1020097013965 A KR1020097013965 A KR 1020097013965A KR 20097013965 A KR20097013965 A KR 20097013965A KR 101432150 B1 KR101432150 B1 KR 101432150B1
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silicon
containing material
substrate
source
deposition
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KR20090088431A (ko
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지유안 예
앤드류 람
이환 김
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어플라이드 머티어리얼스, 인코포레이티드
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02529—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/608—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having non-planar bodies, e.g. having recessed gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical Vapour Deposition (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Recrystallisation Techniques (AREA)
KR1020097013965A 2006-12-12 2007-12-11 실리콘을 함유하는 에피택셜 층들의 형성 Expired - Fee Related KR101432150B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/609,590 US20080138955A1 (en) 2006-12-12 2006-12-12 Formation of epitaxial layer containing silicon
US11/609,590 2006-12-12
PCT/US2007/087050 WO2008073926A2 (en) 2006-12-12 2007-12-11 Formation of epitaxial layers containing silicon

Publications (2)

Publication Number Publication Date
KR20090088431A KR20090088431A (ko) 2009-08-19
KR101432150B1 true KR101432150B1 (ko) 2014-08-20

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Country Status (6)

Country Link
US (1) US20080138955A1 (enExample)
JP (1) JP5808522B2 (enExample)
KR (1) KR101432150B1 (enExample)
CN (2) CN101548363A (enExample)
TW (1) TWI383435B (enExample)
WO (1) WO2008073926A2 (enExample)

Cited By (2)

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KR20190009699A (ko) * 2017-07-19 2019-01-29 에이에스엠 아이피 홀딩 비.브이. 4족 반도체 증착 방법 및 관련된 반도체 소자 구조체
KR20190009700A (ko) * 2017-07-19 2019-01-29 에이에스엠 아이피 홀딩 비.브이. Iv족 반도체의 선택적 증착 방법 및 이와 관련된 반도체 소자 구조

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US7833883B2 (en) * 2007-03-28 2010-11-16 Intel Corporation Precursor gas mixture for depositing an epitaxial carbon-doped silicon film
US7994015B2 (en) 2009-04-21 2011-08-09 Applied Materials, Inc. NMOS transistor devices and methods for fabricating same
US8999798B2 (en) * 2009-12-17 2015-04-07 Applied Materials, Inc. Methods for forming NMOS EPI layers
DE102010055564A1 (de) * 2010-12-23 2012-06-28 Johann-Wolfgang-Goethe Universität Frankfurt am Main Verfahren und Vorrichtung zur Abscheidung von Silizium auf einem Substrat
WO2012102755A1 (en) * 2011-01-28 2012-08-02 Applied Materials, Inc. Carbon addition for low resistivity in situ doped silicon epitaxy
TWI521600B (zh) * 2011-06-03 2016-02-11 應用材料股份有限公司 在矽基材上形成高生長速率低電阻率的鍺膜之方法〈一〉
KR101371435B1 (ko) 2012-01-04 2014-03-12 주식회사 유진테크 처리유닛을 포함하는 기판 처리 장치
KR101677560B1 (ko) 2014-03-18 2016-11-18 주식회사 유진테크 공정공간 높이별 가열온도를 조절할 수 있는 히터를 구비한 기판 처리 장치
RU2618279C1 (ru) * 2016-06-23 2017-05-03 Акционерное общество "Эпиэл" Способ изготовления эпитаксиального слоя кремния на диэлектрической подложке
US11404270B2 (en) * 2018-11-30 2022-08-02 Texas Instruments Incorporated Microelectronic device substrate formed by additive process
US10861715B2 (en) 2018-12-28 2020-12-08 Texas Instruments Incorporated 3D printed semiconductor package
US10910465B2 (en) 2018-12-28 2021-02-02 Texas Instruments Incorporated 3D printed semiconductor package
KR102189557B1 (ko) * 2019-03-05 2020-12-11 에스케이머티리얼즈 주식회사 박막 트랜지스터 및 이의 제조방법
EP3832696A1 (en) * 2019-12-06 2021-06-09 Imec VZW Formation of a sige(:b):ga layer
TW202208659A (zh) * 2020-06-16 2022-03-01 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 沉積含硼之矽鍺層的方法
KR20210158809A (ko) * 2020-06-24 2021-12-31 에이에스엠 아이피 홀딩 비.브이. 실리콘이 구비된 층을 형성하는 방법
CN115491655A (zh) * 2022-10-05 2022-12-20 江苏筑磊电子科技有限公司 一种半导体技术中用于低温清洁和沉积的微波等离子辅助方法

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190009699A (ko) * 2017-07-19 2019-01-29 에이에스엠 아이피 홀딩 비.브이. 4족 반도체 증착 방법 및 관련된 반도체 소자 구조체
KR20190009700A (ko) * 2017-07-19 2019-01-29 에이에스엠 아이피 홀딩 비.브이. Iv족 반도체의 선택적 증착 방법 및 이와 관련된 반도체 소자 구조
KR102645400B1 (ko) 2017-07-19 2024-03-08 에이에스엠 아이피 홀딩 비.브이. Iv족 반도체의 선택적 증착 방법 및 이와 관련된 반도체 소자 구조
KR20240036528A (ko) * 2017-07-19 2024-03-20 에이에스엠 아이피 홀딩 비.브이. Iv족 반도체의 선택적 증착 방법 및 이와 관련된 반도체 소자 구조
KR102693031B1 (ko) * 2017-07-19 2024-08-08 에이에스엠 아이피 홀딩 비.브이. 4족 반도체 증착 방법 및 관련된 반도체 소자 구조체
KR102869786B1 (ko) 2017-07-19 2025-10-14 에이에스엠 아이피 홀딩 비.브이. Iv족 반도체의 선택적 증착 방법 및 이와 관련된 반도체 소자 구조

Also Published As

Publication number Publication date
TWI383435B (zh) 2013-01-21
JP5808522B2 (ja) 2015-11-10
CN104599945B (zh) 2017-11-28
JP2010512669A (ja) 2010-04-22
US20080138955A1 (en) 2008-06-12
CN101548363A (zh) 2009-09-30
KR20090088431A (ko) 2009-08-19
WO2008073926A2 (en) 2008-06-19
TW200834667A (en) 2008-08-16
WO2008073926A3 (en) 2009-01-15
CN104599945A (zh) 2015-05-06

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