KR101423852B1 - 지지체 금속박 부착 복합 금속층, 이것을 이용한 배선판과 그 제조방법, 이 배선판을 이용한 반도체 패키지의 제조방법 - Google Patents

지지체 금속박 부착 복합 금속층, 이것을 이용한 배선판과 그 제조방법, 이 배선판을 이용한 반도체 패키지의 제조방법 Download PDF

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Publication number
KR101423852B1
KR101423852B1 KR1020127020047A KR20127020047A KR101423852B1 KR 101423852 B1 KR101423852 B1 KR 101423852B1 KR 1020127020047 A KR1020127020047 A KR 1020127020047A KR 20127020047 A KR20127020047 A KR 20127020047A KR 101423852 B1 KR101423852 B1 KR 101423852B1
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KR
South Korea
Prior art keywords
metal layer
layer
metal
support
wiring board
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KR1020127020047A
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English (en)
Korean (ko)
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KR20120115351A (ko
Inventor
코이치 타나베
노부치카 야기하시
타다시 타무라
쿠니지 스즈키
요시아키 츠보마츠
Original Assignee
히타치가세이가부시끼가이샤
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Publication of KR20120115351A publication Critical patent/KR20120115351A/ko
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0264—Peeling insulating layer, e.g. foil, or separating mask
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0376—Etching temporary metallic carrier substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Laminated Bodies (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
KR1020127020047A 2010-03-30 2011-03-28 지지체 금속박 부착 복합 금속층, 이것을 이용한 배선판과 그 제조방법, 이 배선판을 이용한 반도체 패키지의 제조방법 KR101423852B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2010077334 2010-03-30
JPJP-P-2010-077334 2010-03-30
JPJP-P-2010-198620 2010-09-06
JP2010198620A JP5473838B2 (ja) 2010-03-30 2010-09-06 支持体金属箔付き複合金属層、これを用いた配線板とその製造方法、この配線板を用いた半導体パッケージの製造方法
PCT/JP2011/057556 WO2011122532A1 (ja) 2010-03-30 2011-03-28 支持体金属箔付き複合金属層、これを用いた配線板とその製造方法、この配線板を用いた半導体パッケージの製造方法

Publications (2)

Publication Number Publication Date
KR20120115351A KR20120115351A (ko) 2012-10-17
KR101423852B1 true KR101423852B1 (ko) 2014-07-25

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KR1020127020047A KR101423852B1 (ko) 2010-03-30 2011-03-28 지지체 금속박 부착 복합 금속층, 이것을 이용한 배선판과 그 제조방법, 이 배선판을 이용한 반도체 패키지의 제조방법

Country Status (4)

Country Link
JP (1) JP5473838B2 (ja)
KR (1) KR101423852B1 (ja)
TW (1) TWI516178B (ja)
WO (1) WO2011122532A1 (ja)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5672524B2 (ja) * 2010-07-02 2015-02-18 日立化成株式会社 半導体素子搭載用パッケージ基板の製造方法
JP5903920B2 (ja) * 2012-02-16 2016-04-13 富士通株式会社 半導体装置の製造方法及び電子装置の製造方法
TWI527173B (zh) * 2013-10-01 2016-03-21 旭德科技股份有限公司 封裝載板
WO2015076372A1 (ja) * 2013-11-22 2015-05-28 三井金属鉱業株式会社 埋設回路を備えるプリント配線板の製造方法及びその製造方法で得られるプリント配線板
JP6592983B2 (ja) * 2015-06-23 2019-10-23 日立化成株式会社 基板製造用キャリア部材及び基板の製造方法
JP6880661B2 (ja) * 2016-11-04 2021-06-02 昭和電工マテリアルズ株式会社 半導体用仮固定材及びそれを用いた半導体装置の製造方法。
WO2022102182A1 (ja) * 2020-11-11 2022-05-19 三井金属鉱業株式会社 配線基板の製造方法
TWI759095B (zh) * 2021-02-04 2022-03-21 欣興電子股份有限公司 封裝結構及其製作方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0955575A (ja) * 1995-08-10 1997-02-25 Mitsui Toatsu Chem Inc 積層体

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02113591A (ja) * 1988-10-22 1990-04-25 Matsushita Electric Works Ltd 印刷配線板の製造方法
DE19910482A1 (de) * 1999-03-10 2000-05-04 Stp Elektronische Systeme Gmbh Verfahren zur Herstellung von Leiterplatten-Schaltungsebenen
JP2005260058A (ja) * 2004-03-12 2005-09-22 Furukawa Circuit Foil Kk キャリア付き極薄銅箔、キャリア付き極薄銅箔の製造方法および配線板
TW200804626A (en) * 2006-05-19 2008-01-16 Mitsui Mining & Smelting Co Copper foil provided with carrier sheet, method for fabricating copper foil provided with carrier sheet, surface-treated copper foil provided with carrier sheet, and copper-clad laminate using the surface-treated copper foil provided with carrier she

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0955575A (ja) * 1995-08-10 1997-02-25 Mitsui Toatsu Chem Inc 積層体

Also Published As

Publication number Publication date
KR20120115351A (ko) 2012-10-17
JP2011228613A (ja) 2011-11-10
JP5473838B2 (ja) 2014-04-16
WO2011122532A1 (ja) 2011-10-06
TWI516178B (zh) 2016-01-01
TW201212743A (en) 2012-03-16

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