KR101173723B1 - 스태거형 컨택트를 구비한 미세한 피치 어레이를 포함하는 반도체 디바이스 및 그 설계 및 제조 방법 - Google Patents

스태거형 컨택트를 구비한 미세한 피치 어레이를 포함하는 반도체 디바이스 및 그 설계 및 제조 방법 Download PDF

Info

Publication number
KR101173723B1
KR101173723B1 KR1020097006151A KR20097006151A KR101173723B1 KR 101173723 B1 KR101173723 B1 KR 101173723B1 KR 1020097006151 A KR1020097006151 A KR 1020097006151A KR 20097006151 A KR20097006151 A KR 20097006151A KR 101173723 B1 KR101173723 B1 KR 101173723B1
Authority
KR
South Korea
Prior art keywords
contact
apertures
mask
forming
active
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020097006151A
Other languages
English (en)
Korean (ko)
Other versions
KR20090057052A (ko
Inventor
존 케이. 이
현태 김
리차드 엘. 스톡스
루안 트랜
Original Assignee
마이크론 테크놀로지, 인크.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 마이크론 테크놀로지, 인크. filed Critical 마이크론 테크놀로지, 인크.
Publication of KR20090057052A publication Critical patent/KR20090057052A/ko
Application granted granted Critical
Publication of KR101173723B1 publication Critical patent/KR101173723B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/485—Bit line contacts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/089—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
KR1020097006151A 2006-08-29 2007-08-28 스태거형 컨택트를 구비한 미세한 피치 어레이를 포함하는 반도체 디바이스 및 그 설계 및 제조 방법 Active KR101173723B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/511,541 US7960797B2 (en) 2006-08-29 2006-08-29 Semiconductor devices including fine pitch arrays with staggered contacts
US11/511,541 2006-08-29
PCT/US2007/076970 WO2008027876A2 (en) 2006-08-29 2007-08-28 Semiconductor devices including fine pitch arrays with staggered contacts and methods for designing and fabricating the same

Publications (2)

Publication Number Publication Date
KR20090057052A KR20090057052A (ko) 2009-06-03
KR101173723B1 true KR101173723B1 (ko) 2012-08-13

Family

ID=39136779

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020097006151A Active KR101173723B1 (ko) 2006-08-29 2007-08-28 스태거형 컨택트를 구비한 미세한 피치 어레이를 포함하는 반도체 디바이스 및 그 설계 및 제조 방법

Country Status (7)

Country Link
US (2) US7960797B2 (https=)
EP (1) EP2057676B1 (https=)
JP (1) JP5532400B2 (https=)
KR (1) KR101173723B1 (https=)
CN (1) CN101506967B (https=)
TW (1) TWI369756B (https=)
WO (1) WO2008027876A2 (https=)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100833201B1 (ko) * 2007-06-15 2008-05-28 삼성전자주식회사 콘택 플러그 및 배선 라인 일체형 구조의 미세 패턴을가지는 반도체 소자 및 그 제조 방법
JP2007103410A (ja) * 2005-09-30 2007-04-19 Elpida Memory Inc 密集コンタクトホールを有する半導体デバイス
KR100834267B1 (ko) * 2007-05-07 2008-05-30 주식회사 하이닉스반도체 노광 마스크 및 이를 이용한 반도체 소자의 콘택홀 제조방법
US7939451B2 (en) * 2007-06-07 2011-05-10 Macronix International Co., Ltd. Method for fabricating a pattern
US8481417B2 (en) 2007-08-03 2013-07-09 Micron Technology, Inc. Semiconductor structures including tight pitch contacts and methods to form same
US8283258B2 (en) * 2007-08-16 2012-10-09 Micron Technology, Inc. Selective wet etching of hafnium aluminum oxide films
US8062971B2 (en) * 2008-03-19 2011-11-22 Infineon Technologies Ag Dual damascene process
KR101409840B1 (ko) * 2008-06-04 2014-06-20 삼성전자주식회사 반도체 소자 및 그 제조방법
US8058732B2 (en) * 2008-11-20 2011-11-15 Fairchild Semiconductor Corporation Semiconductor die structures for wafer-level chipscale packaging of power devices, packages and systems for using the same, and methods of making the same
US8541311B2 (en) * 2010-12-22 2013-09-24 GlobalFoundries, Inc. Integrated circuit fabrication methods utilizing embedded hardmask layers for high resolution patterning
JP2012199381A (ja) * 2011-03-22 2012-10-18 Toshiba Corp 半導体装置およびその製造方法
US8586478B2 (en) * 2011-03-28 2013-11-19 Renesas Electronics Corporation Method of making a semiconductor device
US9536952B2 (en) 2014-05-12 2017-01-03 Intersil Americas LLC Body contact layouts for semiconductor structures
CN109983564B (zh) * 2016-11-16 2023-05-02 东京毅力科创株式会社 亚分辨率衬底图案化的方法
JP6939497B2 (ja) * 2017-12-13 2021-09-22 富士電機株式会社 抵抗素子
CN108735711B (zh) * 2017-04-13 2021-04-23 中芯国际集成电路制造(北京)有限公司 一种半导体器件及其制备方法、电子装置
US10361158B2 (en) * 2017-08-29 2019-07-23 Micron Technology, Inc. Integrated assemblies having structures along a first pitch coupled with structures along a second pitch different from the first pitch
US10559492B2 (en) * 2017-11-15 2020-02-11 Taiwan Semiconductor Manufacturing Company, Ltd. Patterning methods for semiconductor devices and structures resulting therefrom
KR102665246B1 (ko) 2018-07-03 2024-05-09 삼성전자주식회사 반도체 장치 및 이의 제조 방법
US10777562B1 (en) * 2019-03-14 2020-09-15 Micron Technology, Inc. Integrated circuity, DRAM circuitry, methods used in forming integrated circuitry, and methods used in forming DRAM circuitry
US11217594B2 (en) * 2019-09-05 2022-01-04 Nanya Technology Corporation Semiconductor device and method for fabricating the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070049035A1 (en) 2005-08-31 2007-03-01 Tran Luan C Method of forming pitch multipled contacts

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4267632A (en) * 1979-10-19 1981-05-19 Intel Corporation Process for fabricating a high density electrically programmable memory array
EP0912996B1 (en) 1996-07-18 2002-01-02 Advanced Micro Devices, Inc. Integrated circuit which uses an etch stop for producing staggered interconnect lines
KR100506101B1 (ko) * 1996-11-14 2006-04-21 텍사스 인스트루먼츠 인코포레이티드 메모리 셀 어레이 제조방법 및 메모리 셀 어레이
US6016000A (en) * 1998-04-22 2000-01-18 Cvc, Inc. Ultra high-speed chip semiconductor integrated circuit interconnect structure and fabrication method using free-space dielectrics
FR2786609B1 (fr) 1998-11-26 2003-10-17 St Microelectronics Sa Circuit integre a capacite interlignes reduite et procede de fabrication associe
CN1184682C (zh) * 1999-03-03 2005-01-12 株式会社日立制作所 半导体集成电路器件及其制造方法
JP2002289815A (ja) 2001-03-23 2002-10-04 Hitachi Ltd 半導体記憶装置
JP4911838B2 (ja) * 2001-07-06 2012-04-04 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
KR100450671B1 (ko) * 2002-02-26 2004-10-01 삼성전자주식회사 스토리지 노드 콘택플러그를 갖는 반도체 소자의 제조방법
KR100502410B1 (ko) * 2002-07-08 2005-07-19 삼성전자주식회사 디램 셀들
KR100448899B1 (ko) * 2002-08-20 2004-09-16 삼성전자주식회사 상변환 기억 소자
JP2004228308A (ja) * 2003-01-22 2004-08-12 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
KR100532424B1 (ko) 2003-03-18 2005-11-30 삼성전자주식회사 반도체 메모리 장치 및 그 제조방법
US7115993B2 (en) * 2004-01-30 2006-10-03 Tokyo Electron Limited Structure comprising amorphous carbon film and method of forming thereof
KR100672816B1 (ko) * 2004-03-16 2007-01-22 삼성전자주식회사 반도체 메모리 장치의 캐패시터 형성방법
JP5172069B2 (ja) * 2004-04-27 2013-03-27 富士通セミコンダクター株式会社 半導体装置
US7638878B2 (en) * 2006-04-13 2009-12-29 Micron Technology, Inc. Devices and systems including the bit lines and bit line contacts

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070049035A1 (en) 2005-08-31 2007-03-01 Tran Luan C Method of forming pitch multipled contacts

Also Published As

Publication number Publication date
US8367482B2 (en) 2013-02-05
TW200822285A (en) 2008-05-16
KR20090057052A (ko) 2009-06-03
JP5532400B2 (ja) 2014-06-25
EP2057676B1 (en) 2019-11-06
WO2008027876A2 (en) 2008-03-06
US20110223761A1 (en) 2011-09-15
US20080054483A1 (en) 2008-03-06
US7960797B2 (en) 2011-06-14
CN101506967A (zh) 2009-08-12
EP2057676A2 (en) 2009-05-13
CN101506967B (zh) 2013-03-13
WO2008027876A3 (en) 2008-06-19
JP2010503218A (ja) 2010-01-28
TWI369756B (en) 2012-08-01

Similar Documents

Publication Publication Date Title
KR101173723B1 (ko) 스태거형 컨택트를 구비한 미세한 피치 어레이를 포함하는 반도체 디바이스 및 그 설계 및 제조 방법
US10714343B1 (en) Semiconductor structure and method for forming same
US10541206B2 (en) Interconnect structure including air gaps enclosed between conductive lines and a permeable dielectric layer
US9852986B1 (en) Method of patterning pillars to form variable continuity cuts in interconnection lines of an integrated circuit
KR20120081253A (ko) 타이트한 피치의 콘택트들을 포함하는 반도체 구조체 및 그의 형성 방법
US20040065958A1 (en) Semiconductor device and method of manufacturing same
KR100611776B1 (ko) 반도체 소자 제조 방법
KR100940360B1 (ko) 기울어진 스토리지노드콘택을 구비한 반도체 소자 및 그의제조 방법
US6878637B2 (en) Method for fabricating semiconductor device capable of improving process margin of self align contact
KR100471409B1 (ko) 반도체소자 제조방법
KR101149053B1 (ko) 반도체 소자의 스토리지노드 콘택 형성방법
KR100691940B1 (ko) 반도체소자의 배선 및 그 형성방법
KR100772077B1 (ko) 반도체 소자의 콘택홀 형성방법
US20040238482A1 (en) Method for fabricating semiconductor device
KR100315457B1 (ko) 반도체 소자의 제조 방법
CN115132571A (zh) 半导体结构的形成方法
KR20030002892A (ko) 반도체소자의 플러그 제조 방법
KR20080064309A (ko) 반도체 소자의 제조방법
KR20040057391A (ko) 반도체소자 제조방법
KR20060131129A (ko) 반도체 소자 제조방법
KR20040002005A (ko) 반도체 소자의 메탈 라인 형성 방법
KR20060075322A (ko) 반도체 장치 제조방법
KR20030050594A (ko) 듀얼 다마신 패턴의 형성 방법 및 그를 이용한 다층금속배선의 제조 방법
KR20050067533A (ko) 습식 세정에 의한 어택을 방지할 수 있는 반도체 장치제조 방법
KR20080030309A (ko) 반도체 소자의 콘택 플러그 형성 방법

Legal Events

Date Code Title Description
A201 Request for examination
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

R15-X000 Change to inventor requested

St.27 status event code: A-3-3-R10-R15-oth-X000

R16-X000 Change to inventor recorded

St.27 status event code: A-3-3-R10-R16-oth-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20150716

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20160721

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20170720

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20180717

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

FPAY Annual fee payment

Payment date: 20190808

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 12

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 13

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 14

U11 Full renewal or maintenance fee paid

Free format text: ST27 STATUS EVENT CODE: A-4-4-U10-U11-OTH-PR1001 (AS PROVIDED BY THE NATIONAL OFFICE)

Year of fee payment: 14

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000