KR100733556B1 - 범프 형성 방법 - Google Patents
범프 형성 방법 Download PDFInfo
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- KR100733556B1 KR100733556B1 KR1020010059758A KR20010059758A KR100733556B1 KR 100733556 B1 KR100733556 B1 KR 100733556B1 KR 1020010059758 A KR1020010059758 A KR 1020010059758A KR 20010059758 A KR20010059758 A KR 20010059758A KR 100733556 B1 KR100733556 B1 KR 100733556B1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0562—Details of resist
- H05K2203/0568—Resist used for applying paste, ink or powder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3494—Heating methods for reflowing of solder
Abstract
Description
합금조성 | 고상선 온도 /℃ | 액상선 온도 /℃ | 1차 가열온도 /℃ | 2차 가열온도 | |
실시예 1 | 50%Sn-50%Pb | 183 | 238 | 220 | 275 |
실시예 2 | 20%Sn-80%Pb | 183 | 277 | 240 | 320 |
실시예 3 | 10%Sn-90%Pb | 275 | 300 | 285 | 340 |
실시예 4 | 92%Sn-8%Sb | 238 | 251 | 240 | 280 |
실시예 5 | 10%Sn-85%Pb-5%Sb | 239 | 277 | 260 | 300 |
금속 I | 금속 II | 배합비 | 1차 가열 온도 /℃ | 2차 가열 온도 /℃ | 최 종 조 성 | |
조성 | 조성 | I : II | ||||
실시예 6 | 63%Sn-37%Pb (액상선 온도 183℃) | 2%Sn-98%Pb (액상선 온도 320℃) | 1 : 9 | 213 | 350 | 8%Sn-92%Pb |
실시예 7 | 35%Sn-65%Pb (액상선 온도 246℃) | 2%Sn-98%Pb (액상선 온도 320℃) | 1 : 9 | 265 | 350 | 5%Sn-95%Pb |
실시예 8 | 100% Sn (융점 232℃) | 100% Pb (융점 327℃) | 1 : 9 | 262 | 357 | 10%Sn-90%Pb |
실시예 9 | 100% Sn (융점 232℃) | 100% Pb (융점 327℃) | 1 : 19 | 262 | 357 | 5%Sn-95%Pb |
Claims (5)
- 전극부가 설치된 기판 표면에 대하여 수지막을 형성하는 공정과,상기 수지막에 대하여, 상기 전극부가 노출하도록 개구부를 형성하는 공정과,고상선(固相線) 온도와 액상선(液相線) 온도 사이에 고상과 액상 공존의 온도 영역을 갖는 조성의 금속을 함유하는 범프(bump) 형성 재료를 상기 개구부에 충전하는 공정과,상기 고상선 온도 이상이고 상기 액상선 온도 미만으로 가열하는 공정과,상기 고상선 온도 미만으로 냉각하는 공정과,상기 수지막을 제거한 후, 상기 기판을 접합 대상물에 탑재하지 않고 상기 액상선 온도 이상으로 가열하는 공정을 포함하는 것을 특징으로 하는 범프 형성 방법.
- 전극부가 설치된 기판 표면에 대하여 수지막을 형성하는 공정과,상기 수지막에 대하여, 상기 전극부가 노출하도록 개구부를 형성하는 공정과,융점이 다른 복수의 금속을 함유하는 범프 형성 재료를 상기 개구부에 충전하는 공정과,상기 복수의 금속의 융점 중 가장 낮은 융점 이상이고 상기 복수의 금속의 융점 중 가장 높은 융점 미만으로 가열하는 공정과,싱기 가장 낮은 융점 미만으로 냉각하는 공정과,상기 수지막을 제거한 후, 상기 기판을 접합 대상물에 탑재하지 않고 상기 가장 높은 융점 이상으로 가열하는 공정을 포함하는 것을 특징으로 하는 범프 형성 방법.
- 전극부가 설치된 기판 표면에 대하여 수지막을 형성하는 공정과,상기 수지막에 대하여, 상기 전극부가 노출하도록 개구부를 형성하는 공정과,1종류 이상의 금속을 함유하는 범프 형성 재료를 상기 개구부에 충전하는 공정과,상기 금속의 일부만이 융해되는 온도 이상이고 상기 금속의 전부가 융해되는 온도 미만으로 가열하는 공정과,상기 금속의 전부가 응고되는 온도 미만으로 냉각하는 공정과,상기 수지막을 제거한 후, 상기 기판을 접합 대상물에 탑재하지 않고 상기 금속의 전부가 융해되는 온도 이상으로 가열하는 공정을 포함하는 것을 특징으로 하는 범프 형성 방법.
- 제1항 내지 제3항 중의 어느 한 항에 있어서,상기 수지막은 감광성 수지인 것을 특징으로 하는 범프 형성 방법.
- 제1항 내지 제3항 중의 어느 한 항에 있어서,상기 범프 형성 재료에 함유되는 상기 금속은 분말 형상이고, 상기 범프 형성 재료는 상기 분말 형상의 금속과, 수지 및 용제를 함유하는 비히클(vehicle) 성분을 혼합하여 페이스트 형상으로 한 땜납 페이스트인 것을 특징으로 하는 범프 형성 방법.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JPJP-P-2001-00136299 | 2001-05-07 | ||
JP2001136299A JP3556922B2 (ja) | 2001-05-07 | 2001-05-07 | バンプ形成方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20020085752A KR20020085752A (ko) | 2002-11-16 |
KR100733556B1 true KR100733556B1 (ko) | 2007-06-28 |
Family
ID=18983607
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020010059758A KR100733556B1 (ko) | 2001-05-07 | 2001-09-26 | 범프 형성 방법 |
Country Status (4)
Country | Link |
---|---|
US (1) | US6524943B1 (ko) |
JP (1) | JP3556922B2 (ko) |
KR (1) | KR100733556B1 (ko) |
TW (1) | TW494038B (ko) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4659262B2 (ja) * | 2001-05-01 | 2011-03-30 | 富士通セミコンダクター株式会社 | 電子部品の実装方法及びペースト材料 |
JP4115306B2 (ja) * | 2003-03-13 | 2008-07-09 | 富士通株式会社 | 半導体装置の製造方法 |
JP4094982B2 (ja) * | 2003-04-15 | 2008-06-04 | ハリマ化成株式会社 | はんだ析出方法およびはんだバンプ形成方法 |
JP4855667B2 (ja) * | 2004-10-15 | 2012-01-18 | ハリマ化成株式会社 | 樹脂マスク層の除去方法およびはんだバンプ付き基板の製造方法 |
JP4654865B2 (ja) * | 2005-09-30 | 2011-03-23 | パナソニック株式会社 | 電子部品実装方法 |
JP2007109859A (ja) * | 2005-10-13 | 2007-04-26 | Nec Electronics Corp | 電子部品の製造方法 |
KR100808106B1 (ko) | 2006-05-16 | 2008-02-29 | 오태성 | 반도체 칩 또는 반도체 칩 웨이퍼에 형성한 박막히터를이용한 솔더범프 형성방법과 그 장치 |
KR100808108B1 (ko) | 2006-06-25 | 2008-02-29 | 오태성 | 반도체 칩에 형성한 박막히터를 이용한 반도체 칩의 플립칩실장 방법과 탈착 방법 |
JP4219951B2 (ja) * | 2006-10-25 | 2009-02-04 | 新光電気工業株式会社 | はんだボール搭載方法及びはんだボール搭載基板の製造方法 |
US7569164B2 (en) | 2007-01-29 | 2009-08-04 | Harima Chemicals, Inc. | Solder precoating method |
KR100978499B1 (ko) * | 2008-11-14 | 2010-08-30 | 재단법인대구경북과학기술원 | 대상 특징 추출 장치 및 방법 |
TWI435666B (zh) | 2010-07-20 | 2014-04-21 | Lg Innotek Co Ltd | 輻散熱電路板及其製造方法 |
WO2012053728A1 (en) | 2010-10-20 | 2012-04-26 | Lg Innotek Co., Ltd. | Printed circuit board and method for manufacturing the same |
CN103797149B (zh) * | 2011-09-16 | 2017-05-24 | 株式会社V技术 | 蒸镀掩膜、蒸镀掩膜的制造方法及薄膜图案形成方法 |
TWI552824B (zh) * | 2011-10-18 | 2016-10-11 | 千住金屬工業股份有限公司 | 焊料凸塊形成方法及裝置 |
IN2014DN07833A (ko) * | 2012-03-20 | 2015-04-24 | Alpha Metals | |
JP6028593B2 (ja) * | 2013-01-28 | 2016-11-16 | 富士通株式会社 | 半導体装置の製造方法 |
JP6044441B2 (ja) * | 2013-04-26 | 2016-12-14 | 株式会社デンソー | 電子装置の製造方法およびこれに用いられる多層基板 |
US9786517B2 (en) * | 2013-09-09 | 2017-10-10 | Intel Corporation | Ablation method and recipe for wafer level underfill material patterning and removal |
KR20150128310A (ko) * | 2014-05-09 | 2015-11-18 | 삼성전기주식회사 | 솔더 페이스트용 플럭스, 솔더 페이스트 및 솔더 범프의 제조 방법 |
EP3809807A1 (en) * | 2019-10-18 | 2021-04-21 | Heraeus Materials Singapore Pte. Ltd. | Manufacturing and tape transfer method for a patteerned preform |
TWI783235B (zh) * | 2020-06-10 | 2022-11-11 | 南亞電路板股份有限公司 | 電路板結構及其形成方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09108884A (ja) * | 1995-09-29 | 1997-04-28 | Delco Electronics Corp | はんだペースト組成物 |
US5672542A (en) * | 1994-08-08 | 1997-09-30 | Hewlett Packard Company | Method of making solder balls by contained paste deposition |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3015436B2 (ja) * | 1990-09-25 | 2000-03-06 | 株式会社東芝 | 半導体装置およびその接続方法 |
JP3266414B2 (ja) | 1994-05-09 | 2002-03-18 | 三菱電機株式会社 | はんだ供給法 |
-
2001
- 2001-05-07 JP JP2001136299A patent/JP3556922B2/ja not_active Expired - Lifetime
- 2001-09-24 TW TW090123486A patent/TW494038B/zh not_active IP Right Cessation
- 2001-09-25 US US09/961,351 patent/US6524943B1/en not_active Expired - Lifetime
- 2001-09-26 KR KR1020010059758A patent/KR100733556B1/ko active IP Right Grant
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5672542A (en) * | 1994-08-08 | 1997-09-30 | Hewlett Packard Company | Method of making solder balls by contained paste deposition |
JPH09108884A (ja) * | 1995-09-29 | 1997-04-28 | Delco Electronics Corp | はんだペースト組成物 |
Also Published As
Publication number | Publication date |
---|---|
JP2002334895A (ja) | 2002-11-22 |
US6524943B1 (en) | 2003-02-25 |
TW494038B (en) | 2002-07-11 |
US20030036255A1 (en) | 2003-02-20 |
JP3556922B2 (ja) | 2004-08-25 |
KR20020085752A (ko) | 2002-11-16 |
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