KR100707899B1 - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

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Publication number
KR100707899B1
KR100707899B1 KR1020050023520A KR20050023520A KR100707899B1 KR 100707899 B1 KR100707899 B1 KR 100707899B1 KR 1020050023520 A KR1020050023520 A KR 1020050023520A KR 20050023520 A KR20050023520 A KR 20050023520A KR 100707899 B1 KR100707899 B1 KR 100707899B1
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South Korea
Prior art keywords
trench
forming
semiconductor substrate
inclination angle
etching
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KR1020050023520A
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Korean (ko)
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KR20060044527A (ko
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다까노리 마쯔모또
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가부시끼가이샤 도시바
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Drying Of Semiconductors (AREA)
KR1020050023520A 2004-03-23 2005-03-22 반도체 장치 및 그 제조 방법 Expired - Lifetime KR100707899B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004085051A JP4564272B2 (ja) 2004-03-23 2004-03-23 半導体装置およびその製造方法
JPJP-P-2004-00085051 2004-03-23

Publications (2)

Publication Number Publication Date
KR20060044527A KR20060044527A (ko) 2006-05-16
KR100707899B1 true KR100707899B1 (ko) 2007-04-16

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US (2) US20050221579A1 (enExample)
JP (1) JP4564272B2 (enExample)
KR (1) KR100707899B1 (enExample)
CN (1) CN100377332C (enExample)

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JP4564272B2 (ja) 2004-03-23 2010-10-20 株式会社東芝 半導体装置およびその製造方法
JP4533358B2 (ja) 2005-10-18 2010-09-01 キヤノン株式会社 インプリント方法、インプリント装置およびチップの製造方法
US8936995B2 (en) * 2006-03-01 2015-01-20 Infineon Technologies Ag Methods of fabricating isolation regions of semiconductor devices and structures thereof
KR100801062B1 (ko) * 2006-07-07 2008-02-04 삼성전자주식회사 트렌치 소자 분리 방법, 이를 이용한 게이트 구조물 형성방법 및 불 휘발성 메모리 소자 형성 방법
KR100800379B1 (ko) * 2006-08-29 2008-02-01 삼성전자주식회사 비휘발성 메모리 소자의 게이트 제조방법
KR100913004B1 (ko) * 2006-09-06 2009-08-20 주식회사 하이닉스반도체 반도체 소자의 트랜치 형성 방법
JP4389229B2 (ja) * 2006-12-20 2009-12-24 エルピーダメモリ株式会社 半導体装置の製造方法
US20080197378A1 (en) * 2007-02-20 2008-08-21 Hua-Shuang Kong Group III Nitride Diodes on Low Index Carrier Substrates
JP2009049230A (ja) * 2007-08-21 2009-03-05 Panasonic Corp 半導体記憶装置及びその製造方法
JP2010272758A (ja) * 2009-05-22 2010-12-02 Hitachi High-Technologies Corp 被エッチング材のプラズマエッチング方法
US8138093B2 (en) * 2009-08-12 2012-03-20 International Business Machines Corporation Method for forming trenches having different widths and the same depth
KR101666645B1 (ko) * 2010-08-05 2016-10-17 삼성전자주식회사 다양한 소자 분리 영역들을 갖는 반도체 소자의 제조 방법
US9653309B2 (en) 2012-05-25 2017-05-16 The Regents Of The University Of California Method for fabrication of high aspect ratio trenches and formation of nanoscale features therefrom
FR2999335B1 (fr) * 2012-12-06 2016-03-11 Commissariat Energie Atomique Procede ameliore de realisation d'un composant a structure suspendue et d'un transistor co-integres sur un meme substrat.
CN104217985A (zh) * 2013-05-31 2014-12-17 中芯国际集成电路制造(上海)有限公司 半导体器件和浅沟槽的制作方法
CN105336696A (zh) * 2014-06-18 2016-02-17 上海华力微电子有限公司 一种同时改善STI和FG Poly填充孔洞工艺窗口的方法
CN105470201A (zh) * 2014-06-18 2016-04-06 上海华力微电子有限公司 一种同时改善STI和FG Poly填充空洞的闪存器件工艺方法
MX2018002975A (es) * 2015-10-16 2018-06-11 Ford Global Tech Llc Sistema y metodo para asistencia de seudonavegacion en un vehículo.
JP6591291B2 (ja) 2016-01-07 2019-10-16 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US10896803B2 (en) 2016-08-19 2021-01-19 The Regents Of The University Of California Ion beam mill etch depth monitoring with nanometer-scale resolution
US10593678B1 (en) * 2018-08-24 2020-03-17 Micron Technology, Inc. Methods of forming semiconductor devices using aspect ratio dependent etching effects, and related semiconductor devices
CN114242726A (zh) * 2021-12-16 2022-03-25 上海华虹宏力半导体制造有限公司 闪存存储器及其制造方法

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JPH11307627A (ja) * 1997-08-01 1999-11-05 Nippon Steel Corp 半導体装置及びその製造方法
KR20010037314A (ko) * 1999-10-15 2001-05-07 윤종용 반도체소자의 트렌치 아이솔레이션 형성 방법
KR20040016695A (ko) * 2002-08-19 2004-02-25 삼성전자주식회사 트렌치 구조물 및 이의 형성 방법
US20050221579A1 (en) 2004-03-23 2005-10-06 Kabushiki Kaisha Toshiba Semiconductor device and method of fabricating the same

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JP4666700B2 (ja) * 1999-08-30 2011-04-06 富士通セミコンダクター株式会社 半導体装置の製造方法
JP3485081B2 (ja) * 1999-10-28 2004-01-13 株式会社デンソー 半導体基板の製造方法
US6303447B1 (en) * 2000-02-11 2001-10-16 Chartered Semiconductor Manufacturing Ltd. Method for forming an extended metal gate using a damascene process
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US7018929B2 (en) * 2002-07-02 2006-03-28 Taiwan Semiconductor Manufacturing Co., Ltd Method for reducing a low volatility byproduct from a wafer surface following an etching process
KR100466196B1 (ko) * 2002-07-18 2005-01-13 주식회사 하이닉스반도체 플래시 메모리 제조방법
JP2004087843A (ja) * 2002-08-27 2004-03-18 Toshiba Corp 半導体装置
JP2004095886A (ja) * 2002-08-30 2004-03-25 Fujitsu Ltd 半導体装置及びその製造方法
KR100481558B1 (ko) * 2002-09-09 2005-04-08 동부아남반도체 주식회사 에어 갭 특성을 이용한 반도체 sti 형성 방법
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JPH11307627A (ja) * 1997-08-01 1999-11-05 Nippon Steel Corp 半導体装置及びその製造方法
KR19990055775A (ko) * 1997-12-27 1999-07-15 김영환 트랜치를 이용한 반도체 소자의 소자분리 방법
KR20010037314A (ko) * 1999-10-15 2001-05-07 윤종용 반도체소자의 트렌치 아이솔레이션 형성 방법
KR20040016695A (ko) * 2002-08-19 2004-02-25 삼성전자주식회사 트렌치 구조물 및 이의 형성 방법
US20050221579A1 (en) 2004-03-23 2005-10-06 Kabushiki Kaisha Toshiba Semiconductor device and method of fabricating the same

Also Published As

Publication number Publication date
CN1674248A (zh) 2005-09-28
US20070082458A1 (en) 2007-04-12
US7781293B2 (en) 2010-08-24
KR20060044527A (ko) 2006-05-16
JP4564272B2 (ja) 2010-10-20
US20050221579A1 (en) 2005-10-06
JP2005276930A (ja) 2005-10-06
CN100377332C (zh) 2008-03-26

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