KR100536036B1 - 반도체 장치 - Google Patents

반도체 장치 Download PDF

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Publication number
KR100536036B1
KR100536036B1 KR10-2000-0011551A KR20000011551A KR100536036B1 KR 100536036 B1 KR100536036 B1 KR 100536036B1 KR 20000011551 A KR20000011551 A KR 20000011551A KR 100536036 B1 KR100536036 B1 KR 100536036B1
Authority
KR
South Korea
Prior art keywords
conductive metal
metal layer
electrode
conductive
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR10-2000-0011551A
Other languages
English (en)
Korean (ko)
Other versions
KR20000076789A (ko
Inventor
와따나베에이지
무라따고우이찌
Original Assignee
후지쯔 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 후지쯔 가부시끼가이샤 filed Critical 후지쯔 가부시끼가이샤
Publication of KR20000076789A publication Critical patent/KR20000076789A/ko
Application granted granted Critical
Publication of KR100536036B1 publication Critical patent/KR100536036B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/012Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/019Manufacture or treatment of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221Structures or relative sizes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251Materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251Materials
    • H10W72/252Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29Bond pads specially adapted therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/923Bond pads having multiple stacked layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/934Cross-sectional shape, i.e. in side view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9415Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/942Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • H10W72/952Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
KR10-2000-0011551A 1999-04-13 2000-03-08 반도체 장치 Expired - Fee Related KR100536036B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP99-105586 1999-04-13
JP11105586A JP2000299337A (ja) 1999-04-13 1999-04-13 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
KR20000076789A KR20000076789A (ko) 2000-12-26
KR100536036B1 true KR100536036B1 (ko) 2005-12-12

Family

ID=14411614

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2000-0011551A Expired - Fee Related KR100536036B1 (ko) 1999-04-13 2000-03-08 반도체 장치

Country Status (4)

Country Link
US (1) US6614113B2 (https=)
JP (1) JP2000299337A (https=)
KR (1) KR100536036B1 (https=)
TW (1) TW533519B (https=)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3387083B2 (ja) * 1999-08-27 2003-03-17 日本電気株式会社 半導体装置及びその製造方法
JP2003045875A (ja) * 2001-07-30 2003-02-14 Nec Kagobutsu Device Kk 半導体装置およびその製造方法
US6768210B2 (en) * 2001-11-01 2004-07-27 Texas Instruments Incorporated Bumpless wafer scale device and board assembly
JP2003140347A (ja) * 2001-11-02 2003-05-14 Tokyo Ohka Kogyo Co Ltd 厚膜ホトレジスト層積層体、厚膜レジストパターンの製造方法、および接続端子の製造方法
DE10156054C2 (de) * 2001-11-15 2003-11-13 Infineon Technologies Ag Herstellungsverfahren für eine Leiterbahn auf einem Substrat
JP2003188313A (ja) * 2001-12-20 2003-07-04 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US6762503B2 (en) * 2002-08-29 2004-07-13 Micron Technology, Inc. Innovative solder ball pad structure to ease design rule, methods of fabricating same and substrates, electronic device assemblies and systems employing same
US6995475B2 (en) * 2003-09-18 2006-02-07 International Business Machines Corporation I/C chip suitable for wire bonding
US20050167837A1 (en) * 2004-01-21 2005-08-04 International Business Machines Corporation Device with area array pads for test probing
US7910471B2 (en) * 2004-02-02 2011-03-22 Texas Instruments Incorporated Bumpless wafer scale device and board assembly
JP3981089B2 (ja) * 2004-02-18 2007-09-26 株式会社東芝 半導体装置とその製造方法
TWI278946B (en) * 2004-07-23 2007-04-11 Advanced Semiconductor Eng Structure and formation method for conductive bump
US20060087039A1 (en) * 2004-10-22 2006-04-27 Taiwan Semiconductor Manufacturing Company, Ltd. Ubm structure for improving reliability and performance
US7416980B2 (en) * 2005-03-11 2008-08-26 Intel Corporation Forming a barrier layer in interconnect joints and structures formed thereby
KR100762354B1 (ko) * 2006-09-11 2007-10-12 주식회사 네패스 플립칩 반도체 패키지 및 그 제조방법
JP5101169B2 (ja) * 2007-05-30 2012-12-19 新光電気工業株式会社 配線基板とその製造方法
CN101765913B (zh) * 2007-07-30 2012-10-03 Nxp股份有限公司 底部粗糙度减小的半导体部件的应力缓冲元件
US8349721B2 (en) * 2008-03-19 2013-01-08 Stats Chippac, Ltd. Semiconductor device and method of forming insulating layer on conductive traces for electrical isolation in fine pitch bonding
JP5350022B2 (ja) * 2009-03-04 2013-11-27 パナソニック株式会社 半導体装置、及び該半導体装置を備えた実装体
US9607936B2 (en) * 2009-10-29 2017-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Copper bump joint structures with improved crack resistance
US8847387B2 (en) * 2009-10-29 2014-09-30 Taiwan Semiconductor Manufacturing Company, Ltd. Robust joint structure for flip-chip bonding
KR101187977B1 (ko) * 2009-12-08 2012-10-05 삼성전기주식회사 패키지 기판 및 그의 제조방법
US9159652B2 (en) * 2013-02-25 2015-10-13 Stmicroelectronics S.R.L. Electronic device comprising at least a chip enclosed in a package and a corresponding assembly process
US9666550B2 (en) * 2014-12-16 2017-05-30 Tongfu Microelectronics Co., Ltd. Method and structure for wafer-level packaging

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63161649A (ja) * 1986-12-25 1988-07-05 Casio Comput Co Ltd 半導体装置の製造方法
JPH10150249A (ja) * 1996-11-20 1998-06-02 Ibiden Co Ltd プリント配線板
KR0169286B1 (ko) * 1994-04-28 1999-02-01 사토 후미오 반도체장치와 그 제조방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0308971B1 (en) * 1987-09-24 1993-11-24 Kabushiki Kaisha Toshiba Bump and method of manufacturing the same
JP3238011B2 (ja) * 1994-07-27 2001-12-10 株式会社東芝 半導体装置
US5977632A (en) * 1998-02-02 1999-11-02 Motorola, Inc. Flip chip bump structure and method of making

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63161649A (ja) * 1986-12-25 1988-07-05 Casio Comput Co Ltd 半導体装置の製造方法
KR0169286B1 (ko) * 1994-04-28 1999-02-01 사토 후미오 반도체장치와 그 제조방법
JPH10150249A (ja) * 1996-11-20 1998-06-02 Ibiden Co Ltd プリント配線板

Also Published As

Publication number Publication date
US6614113B2 (en) 2003-09-02
US20020003302A1 (en) 2002-01-10
JP2000299337A (ja) 2000-10-24
KR20000076789A (ko) 2000-12-26
TW533519B (en) 2003-05-21

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