KR100522130B1 - 웨이퍼 패시베이션 구조 및 제조방법 - Google Patents
웨이퍼 패시베이션 구조 및 제조방법 Download PDFInfo
- Publication number
- KR100522130B1 KR100522130B1 KR10-2000-7007182A KR20007007182A KR100522130B1 KR 100522130 B1 KR100522130 B1 KR 100522130B1 KR 20007007182 A KR20007007182 A KR 20007007182A KR 100522130 B1 KR100522130 B1 KR 100522130B1
- Authority
- KR
- South Korea
- Prior art keywords
- dielectric layer
- forming
- layer
- delete delete
- dielectric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
- H01L2224/05558—Shape in side view conformal layer on a patterned surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13005—Structure
- H01L2224/13006—Bump connector larger than the underlying bonding area, e.g. than the under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13022—Disposition the bump connector being at least partially embedded in the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/85424—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85444—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85447—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01018—Argon [Ar]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01028—Nickel [Ni]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01072—Hafnium [Hf]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
- H01L2924/05042—Si3N4
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30105—Capacitance
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/958—Passivation layer
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2005-7010038A KR100526445B1 (ko) | 1997-12-31 | 1998-11-16 | 웨이퍼 패시베이션 구조 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/002,178 | 1997-12-31 | ||
| US09/002,178 US6875681B1 (en) | 1997-12-31 | 1997-12-31 | Wafer passivation structure and method of fabrication |
| PCT/US1998/024358 WO1999034423A1 (en) | 1997-12-31 | 1998-11-16 | Wafer passivation structure and method of fabrication |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2005-7010038A Division KR100526445B1 (ko) | 1997-12-31 | 1998-11-16 | 웨이퍼 패시베이션 구조 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20010033662A KR20010033662A (ko) | 2001-04-25 |
| KR100522130B1 true KR100522130B1 (ko) | 2005-10-19 |
Family
ID=21699571
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2005-7010038A Expired - Lifetime KR100526445B1 (ko) | 1997-12-31 | 1998-11-16 | 웨이퍼 패시베이션 구조 |
| KR10-2000-7007182A Expired - Lifetime KR100522130B1 (ko) | 1997-12-31 | 1998-11-16 | 웨이퍼 패시베이션 구조 및 제조방법 |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2005-7010038A Expired - Lifetime KR100526445B1 (ko) | 1997-12-31 | 1998-11-16 | 웨이퍼 패시베이션 구조 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US6875681B1 (enExample) |
| JP (1) | JP4564166B2 (enExample) |
| KR (2) | KR100526445B1 (enExample) |
| AU (1) | AU1410999A (enExample) |
| WO (1) | WO1999034423A1 (enExample) |
Families Citing this family (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6620720B1 (en) * | 2000-04-10 | 2003-09-16 | Agere Systems Inc | Interconnections to copper IC's |
| US6426282B1 (en) * | 2000-05-04 | 2002-07-30 | Applied Materials, Inc. | Method of forming solder bumps on a semiconductor wafer |
| US7034402B1 (en) | 2000-06-28 | 2006-04-25 | Intel Corporation | Device with segmented ball limiting metallurgy |
| US6521996B1 (en) * | 2000-06-30 | 2003-02-18 | Intel Corporation | Ball limiting metallurgy for input/outputs and methods of fabrication |
| FR2828009B1 (fr) * | 2001-07-25 | 2003-10-10 | Novatec | Methode de realisation de bossages presentant des performances thermomecaniques ameliorees |
| US7180195B2 (en) | 2003-12-17 | 2007-02-20 | Intel Corporation | Method and apparatus for improved power routing |
| US9222169B2 (en) * | 2004-03-15 | 2015-12-29 | Sharp Laboratories Of America, Inc. | Silicon oxide-nitride-carbide thin-film with embedded nanocrystalline semiconductor particles |
| JP4525129B2 (ja) * | 2004-03-26 | 2010-08-18 | ソニー株式会社 | 固体撮像素子とその製造方法、及び半導体集積回路装置とその製造方法 |
| US7452803B2 (en) * | 2004-08-12 | 2008-11-18 | Megica Corporation | Method for fabricating chip structure |
| JP4504791B2 (ja) * | 2004-11-24 | 2010-07-14 | パナソニック株式会社 | 半導体回路装置及びその製造方法 |
| WO2006070808A1 (ja) * | 2004-12-28 | 2006-07-06 | Rohm Co., Ltd. | 半導体チップおよびその製造方法、半導体チップの電極構造およびその形成方法、ならびに半導体装置 |
| US7927933B2 (en) * | 2005-02-16 | 2011-04-19 | Imec | Method to enhance the initiation of film growth |
| US20060211232A1 (en) * | 2005-03-16 | 2006-09-21 | Mei-Jen Liu | Method for Manufacturing Gold Bumps |
| CN1901162B (zh) | 2005-07-22 | 2011-04-20 | 米辑电子股份有限公司 | 连续电镀制作线路组件的方法及线路组件结构 |
| KR100660893B1 (ko) * | 2005-11-22 | 2006-12-26 | 삼성전자주식회사 | 정렬 마크막을 구비하는 반도체 소자 및 그 제조 방법 |
| JP4854675B2 (ja) * | 2005-11-28 | 2012-01-18 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
| US20080163897A1 (en) * | 2007-01-10 | 2008-07-10 | Applied Materials, Inc. | Two step process for post ash cleaning for cu/low-k dual damascene structure with metal hard mask |
| US20080237822A1 (en) * | 2007-03-30 | 2008-10-02 | Raravikar Nachiket R | Microelectronic die having nano-particle containing passivation layer and package including same |
| US8373275B2 (en) * | 2008-01-29 | 2013-02-12 | International Business Machines Corporation | Fine pitch solder bump structure with built-in stress buffer |
| KR101037832B1 (ko) * | 2008-05-09 | 2011-05-31 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
| KR101140063B1 (ko) * | 2010-09-14 | 2012-04-30 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 및 그 제조 방법 |
| US8580672B2 (en) * | 2011-10-25 | 2013-11-12 | Globalfoundries Inc. | Methods of forming bump structures that include a protection layer |
| US8765531B2 (en) * | 2012-08-21 | 2014-07-01 | Infineon Technologies Ag | Method for manufacturing a metal pad structure of a die, a method for manufacturing a bond pad of a chip, a die arrangement and a chip arrangement |
| US9502343B1 (en) * | 2015-09-18 | 2016-11-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dummy metal with zigzagged edges |
| US11939212B2 (en) | 2019-12-23 | 2024-03-26 | Industrial Technology Research Institute | MEMS device, manufacturing method of the same, and integrated MEMS module using the same |
| US11365117B2 (en) | 2019-12-23 | 2022-06-21 | Industrial Technology Research Institute | MEMS device and manufacturing method of the same |
| US11251114B2 (en) * | 2020-05-01 | 2022-02-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package substrate insulation opening design |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR890005819A (ko) * | 1987-09-21 | 1989-05-17 | 강진구 | 반도체 소자의 보호막 제조방법 |
| KR890011056A (ko) * | 1987-12-15 | 1989-08-12 | 강진구 | 반도체 장치의 제조방법 |
| KR970003632A (ko) * | 1995-06-28 | 1997-01-28 | 김주용 | 반도체 소자의 보호막 제조방법 |
| KR100323657B1 (ko) * | 1994-05-24 | 2002-06-24 | 클라크 3세 존 엠. | 소울더범프를형성시키는방법 |
Family Cites Families (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5354695A (en) | 1992-04-08 | 1994-10-11 | Leedy Glenn J | Membrane dielectric isolation IC fabrication |
| US4921810A (en) * | 1988-06-22 | 1990-05-01 | Nec Electronics Inc. | Method for testing semiconductor devices |
| US4927505A (en) * | 1988-07-05 | 1990-05-22 | Motorola Inc. | Metallization scheme providing adhesion and barrier properties |
| US5023205A (en) * | 1989-04-27 | 1991-06-11 | Polycon | Method of fabricating hybrid circuit structures |
| JP2814009B2 (ja) * | 1990-06-05 | 1998-10-22 | 三菱電機株式会社 | 半導体装置の製造方法 |
| US5136364A (en) * | 1991-06-12 | 1992-08-04 | National Semiconductor Corporation | Semiconductor die sealing |
| US5369695A (en) * | 1992-01-06 | 1994-11-29 | At&T Corp. | Method of redirecting a telephone call to an alternate destination |
| US5787010A (en) * | 1992-04-02 | 1998-07-28 | Schaefer; Thomas J. | Enhanced dynamic programming method for technology mapping of combinational logic circuits |
| US5612254A (en) * | 1992-06-29 | 1997-03-18 | Intel Corporation | Methods of forming an interconnect on a semiconductor substrate |
| JP2611615B2 (ja) * | 1992-12-15 | 1997-05-21 | 日本電気株式会社 | 半導体装置の製造方法 |
| TW347149U (en) * | 1993-02-26 | 1998-12-01 | Dow Corning | Integrated circuits protected from the environment by ceramic and barrier metal layers |
| US5369299A (en) * | 1993-07-22 | 1994-11-29 | National Semiconductor Corporation | Tamper resistant integrated circuit structure |
| US5565384A (en) * | 1994-04-28 | 1996-10-15 | Texas Instruments Inc | Self-aligned via using low permittivity dielectric |
| EP0696056B1 (en) * | 1994-07-29 | 2000-01-19 | STMicroelectronics, Inc. | Method of testing and repairing an integrated circuit structure and forming a passivation structure |
| DE69435294D1 (de) * | 1994-11-07 | 2010-07-01 | Macronix Int Co Ltd | Passivierungsverfahren für eine integrierte schaltung |
| US5587336A (en) | 1994-12-09 | 1996-12-24 | Vlsi Technology | Bump formation on yielded semiconductor dies |
| US6204074B1 (en) * | 1995-01-09 | 2001-03-20 | International Business Machines Corporation | Chip design process for wire bond and flip-chip package |
| US5559056A (en) | 1995-01-13 | 1996-09-24 | National Semiconductor Corporation | Method and apparatus for capping metallization layer |
| US5661082A (en) * | 1995-01-20 | 1997-08-26 | Motorola, Inc. | Process for forming a semiconductor device having a bond pad |
| DE69617928T2 (de) * | 1995-03-20 | 2002-07-18 | Unitive International Ltd., Curacao | Löthöcker-herstellungsverfahren und strukturen mit einer titan-sperrschicht |
| US5900668A (en) * | 1995-11-30 | 1999-05-04 | Advanced Micro Devices, Inc. | Low capacitance interconnection |
| US5693565A (en) * | 1996-07-15 | 1997-12-02 | Dow Corning Corporation | Semiconductor chips suitable for known good die testing |
| JP3305211B2 (ja) * | 1996-09-10 | 2002-07-22 | 松下電器産業株式会社 | 半導体装置及びその製造方法 |
| US6025275A (en) * | 1996-12-19 | 2000-02-15 | Texas Instruments Incorporated | Method of forming improved thick plated copper interconnect and associated auxiliary metal interconnect |
| US5759906A (en) * | 1997-04-11 | 1998-06-02 | Industrial Technology Research Institute | Planarization method for intermetal dielectrics between multilevel interconnections on integrated circuits |
| US6143638A (en) * | 1997-12-31 | 2000-11-07 | Intel Corporation | Passivation structure and its method of fabrication |
-
1997
- 1997-12-31 US US09/002,178 patent/US6875681B1/en not_active Expired - Lifetime
-
1998
- 1998-11-16 AU AU14109/99A patent/AU1410999A/en not_active Abandoned
- 1998-11-16 KR KR10-2005-7010038A patent/KR100526445B1/ko not_active Expired - Lifetime
- 1998-11-16 WO PCT/US1998/024358 patent/WO1999034423A1/en not_active Ceased
- 1998-11-16 JP JP2000526962A patent/JP4564166B2/ja not_active Expired - Lifetime
- 1998-11-16 KR KR10-2000-7007182A patent/KR100522130B1/ko not_active Expired - Lifetime
-
2005
- 2005-02-15 US US11/059,097 patent/US7145235B2/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR890005819A (ko) * | 1987-09-21 | 1989-05-17 | 강진구 | 반도체 소자의 보호막 제조방법 |
| KR890011056A (ko) * | 1987-12-15 | 1989-08-12 | 강진구 | 반도체 장치의 제조방법 |
| KR100323657B1 (ko) * | 1994-05-24 | 2002-06-24 | 클라크 3세 존 엠. | 소울더범프를형성시키는방법 |
| KR970003632A (ko) * | 1995-06-28 | 1997-01-28 | 김주용 | 반도체 소자의 보호막 제조방법 |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20010033662A (ko) | 2001-04-25 |
| KR20050065684A (ko) | 2005-06-29 |
| US7145235B2 (en) | 2006-12-05 |
| AU1410999A (en) | 1999-07-19 |
| JP4564166B2 (ja) | 2010-10-20 |
| US20050158978A1 (en) | 2005-07-21 |
| US6875681B1 (en) | 2005-04-05 |
| KR100526445B1 (ko) | 2005-11-08 |
| JP2002500440A (ja) | 2002-01-08 |
| WO1999034423A1 (en) | 1999-07-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100522130B1 (ko) | 웨이퍼 패시베이션 구조 및 제조방법 | |
| US5900668A (en) | Low capacitance interconnection | |
| US6150725A (en) | Semiconductor devices with means to reduce contamination | |
| KR100918129B1 (ko) | 본드 패드를 갖는 상호 결선 구조체 및 본드 패드 상의범프 사이트 형성 방법 | |
| KR100360387B1 (ko) | 새로운 패시베이션 구조 및 그것의 제조방법 | |
| US6051882A (en) | Subtractive dual damascene semiconductor device | |
| US6143672A (en) | Method of reducing metal voidings in 0.25 μm AL interconnect | |
| US5756396A (en) | Method of making a multi-layer wiring structure having conductive sidewall etch stoppers and a stacked plug interconnect | |
| US6057226A (en) | Air gap based low dielectric constant interconnect structure and method of making same | |
| US5583739A (en) | Capacitor fabricated on a substrate containing electronic circuitry | |
| US6027980A (en) | Method of forming a decoupling capacitor | |
| US6638867B2 (en) | Method for forming a top interconnection level and bonding pads on an integrated circuit chip | |
| US6404058B1 (en) | Semiconductor device having interconnection implemented by refractory metal nitride layer and refractory metal silicide layer and process of fabrication thereof | |
| US7642649B2 (en) | Support structure for low-k dielectrics | |
| JPH01503021A (ja) | シリコンウエハ内に貫通導体を形成する為の平担化方法 | |
| EP0507881A1 (en) | Semiconductor interconnect structure utilizing a polyimide insulator | |
| US6054376A (en) | Method of sealing a semiconductor substrate | |
| US5861341A (en) | Plated nickel-gold/dielectric interface for passivated MMICs | |
| JPH05347359A (ja) | 集積回路上の多レベルメタライゼーション構造およびその形成方法 | |
| KR100352304B1 (ko) | 반도체 장치 및 그 제조 방법 | |
| JPH0569308B2 (enExample) | ||
| KR0154190B1 (ko) | 반도체 소자의 텅스텐-플러그 형성방법 | |
| JP2004071679A (ja) | 半導体素子の電極およびその製造方法 | |
| KR19980039374A (ko) | 반도체 장치 및 그 제조 방법 | |
| KR19980047431A (ko) | 반도체 장치의 제조 방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0105 | International application |
Patent event date: 20000627 Patent event code: PA01051R01D Comment text: International Patent Application |
|
| PA0201 | Request for examination | ||
| PG1501 | Laying open of application | ||
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20020418 Patent event code: PE09021S01D |
|
| AMND | Amendment | ||
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20021123 Patent event code: PE09021S01D |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20030818 Patent event code: PE09021S01D |
|
| AMND | Amendment | ||
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20040421 Patent event code: PE09021S01D |
|
| E601 | Decision to refuse application | ||
| PE0601 | Decision on rejection of patent |
Patent event date: 20050325 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 20040421 Comment text: Notification of reason for refusal Patent event code: PE06011S01I Patent event date: 20030818 Comment text: Notification of reason for refusal Patent event code: PE06011S01I Patent event date: 20021123 Comment text: Notification of reason for refusal Patent event code: PE06011S01I Patent event date: 20020418 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |
|
| A107 | Divisional application of patent | ||
| AMND | Amendment | ||
| J201 | Request for trial against refusal decision | ||
| PA0104 | Divisional application for international application |
Comment text: Divisional Application for International Patent Patent event code: PA01041R01D Patent event date: 20050602 |
|
| PJ0201 | Trial against decision of rejection |
Patent event date: 20050602 Comment text: Request for Trial against Decision on Refusal Patent event code: PJ02012R01D Patent event date: 20050325 Comment text: Decision to Refuse Application Patent event code: PJ02011S01I Appeal kind category: Appeal against decision to decline refusal Decision date: 20050711 Appeal identifier: 2005101003595 Request date: 20050602 |
|
| PB0901 | Examination by re-examination before a trial |
Comment text: Amendment to Specification, etc. Patent event date: 20050602 Patent event code: PB09011R02I Comment text: Request for Trial against Decision on Refusal Patent event date: 20050602 Patent event code: PB09011R01I Comment text: Amendment to Specification, etc. Patent event date: 20031014 Patent event code: PB09011R02I Comment text: Amendment to Specification, etc. Patent event date: 20020607 Patent event code: PB09011R02I |
|
| B701 | Decision to grant | ||
| PB0701 | Decision of registration after re-examination before a trial |
Patent event date: 20050711 Comment text: Decision to Grant Registration Patent event code: PB07012S01D Patent event date: 20050708 Comment text: Transfer of Trial File for Re-examination before a Trial Patent event code: PB07011S01I |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 20051010 Patent event code: PR07011E01D |
|
| PR1002 | Payment of registration fee |
Payment date: 20051011 End annual number: 3 Start annual number: 1 |
|
| PG1601 | Publication of registration | ||
| PR1001 | Payment of annual fee |
Payment date: 20081007 Start annual number: 4 End annual number: 4 |
|
| PR1001 | Payment of annual fee |
Payment date: 20090925 Start annual number: 5 End annual number: 5 |
|
| PR1001 | Payment of annual fee |
Payment date: 20100930 Start annual number: 6 End annual number: 6 |
|
| PR1001 | Payment of annual fee |
Payment date: 20110927 Start annual number: 7 End annual number: 7 |
|
| FPAY | Annual fee payment |
Payment date: 20120919 Year of fee payment: 8 |
|
| PR1001 | Payment of annual fee |
Payment date: 20120919 Start annual number: 8 End annual number: 8 |
|
| FPAY | Annual fee payment |
Payment date: 20131001 Year of fee payment: 9 |
|
| PR1001 | Payment of annual fee |
Payment date: 20131001 Start annual number: 9 End annual number: 9 |
|
| FPAY | Annual fee payment |
Payment date: 20140930 Year of fee payment: 10 |
|
| PR1001 | Payment of annual fee |
Payment date: 20140930 Start annual number: 10 End annual number: 10 |
|
| FPAY | Annual fee payment |
Payment date: 20151002 Year of fee payment: 11 |
|
| PR1001 | Payment of annual fee |
Payment date: 20151002 Start annual number: 11 End annual number: 11 |
|
| FPAY | Annual fee payment |
Payment date: 20160929 Year of fee payment: 12 |
|
| PR1001 | Payment of annual fee |
Payment date: 20160929 Start annual number: 12 End annual number: 12 |
|
| EXPY | Expiration of term | ||
| PC1801 | Expiration of term |
Termination date: 20190516 Termination category: Expiration of duration |