KR100390997B1 - 금속 배선 형성 방법 - Google Patents
금속 배선 형성 방법 Download PDFInfo
- Publication number
- KR100390997B1 KR100390997B1 KR10-2001-0037476A KR20010037476A KR100390997B1 KR 100390997 B1 KR100390997 B1 KR 100390997B1 KR 20010037476 A KR20010037476 A KR 20010037476A KR 100390997 B1 KR100390997 B1 KR 100390997B1
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- forming
- barrier layer
- contact hole
- plug
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
Abstract
Description
Claims (4)
- 기판 상에 콘택홀이 구비된 층간 절연막을 형성하는 단계;상기 콘택홀을 포함한 층간 절연막 상에 제 1 베리어층을 형성하되, 상기 콘택홀 탑 코너 부위에 오버행이 발생되는 단계;상기 제 1 베리어층을 대기 중에 노출시켜 상기 제 1 베리어층 표면에 제 1 베리어 산화물을 형성하는 단계;상기 제 1 베리어 산화물을 식각하여 상기 오버행을 제거하는 단계;상기 제 1 베리어층 상에 제 2 베리어층과 플러그용 도전층을 형성하는 단계를 포함하는 금속 배선 형성 방법.
- 제 1 항에 있어서,상기 제 1 베리어층을 티타늄(Ti)층으로 형성함을 특징으로 하는 금속 배선 형성 방법.
- 제 2 항에 있어서,상기 티타늄 산화물을 100W ∼ 5kW의 파워(Power), 300 ∼ 800℃의 온도 및 0.1 ∼ 100Torr의 압력에서 플라즈마를 사용한 식각 공정을 10초 ∼ 10분간 진행하여 식각함을 특징으로 하는 금속 배선 형성 방법.
- 제 3 항에 있어서,상기 티타늄 산화물의 식각 공정은 N2,H2,N2/H2혼합기체, N2/H2/He 혼합기체 및 N2/H2/Ar 혼합기체 등을 사용함을 특징으로 하는 금속 배선 형성 방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2001-0037476A KR100390997B1 (ko) | 2001-06-28 | 2001-06-28 | 금속 배선 형성 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2001-0037476A KR100390997B1 (ko) | 2001-06-28 | 2001-06-28 | 금속 배선 형성 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20030001789A KR20030001789A (ko) | 2003-01-08 |
KR100390997B1 true KR100390997B1 (ko) | 2003-07-12 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR10-2001-0037476A KR100390997B1 (ko) | 2001-06-28 | 2001-06-28 | 금속 배선 형성 방법 |
Country Status (1)
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KR (1) | KR100390997B1 (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100870271B1 (ko) | 2007-06-28 | 2008-11-25 | 주식회사 하이닉스반도체 | 반도체 소자의 금속배선 및 그의 형성 방법 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07135250A (ja) * | 1993-11-10 | 1995-05-23 | Nec Corp | 半導体装置の製造方法 |
KR970030665A (ko) * | 1995-11-22 | 1997-06-26 | 김주용 | 반도체 소자의 베리어 금속층 형성방법 |
US5654233A (en) * | 1996-04-08 | 1997-08-05 | Taiwan Semiconductor Manufacturing Company Ltd | Step coverage enhancement process for sub half micron contact/via |
JPH09326436A (ja) * | 1996-06-06 | 1997-12-16 | Sony Corp | 配線形成方法 |
-
2001
- 2001-06-28 KR KR10-2001-0037476A patent/KR100390997B1/ko active IP Right Grant
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07135250A (ja) * | 1993-11-10 | 1995-05-23 | Nec Corp | 半導体装置の製造方法 |
KR970030665A (ko) * | 1995-11-22 | 1997-06-26 | 김주용 | 반도체 소자의 베리어 금속층 형성방법 |
US5654233A (en) * | 1996-04-08 | 1997-08-05 | Taiwan Semiconductor Manufacturing Company Ltd | Step coverage enhancement process for sub half micron contact/via |
JPH09326436A (ja) * | 1996-06-06 | 1997-12-16 | Sony Corp | 配線形成方法 |
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Publication number | Publication date |
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KR20030001789A (ko) | 2003-01-08 |
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