KR100735630B1 - 금속 배선 형성 방법 - Google Patents
금속 배선 형성 방법 Download PDFInfo
- Publication number
- KR100735630B1 KR100735630B1 KR1020010037478A KR20010037478A KR100735630B1 KR 100735630 B1 KR100735630 B1 KR 100735630B1 KR 1020010037478 A KR1020010037478 A KR 1020010037478A KR 20010037478 A KR20010037478 A KR 20010037478A KR 100735630 B1 KR100735630 B1 KR 100735630B1
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- Prior art keywords
- forming
- layer
- film
- tungsten
- plug
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (3)
- 제 1 배선층 상에 비아홀을 갖는 층간 절연막을 형성하는 단계;상기 비아홀을 매립하는 플러그를 형성하는 단계;상기 플러그 이외의 층간 절연막 상에 보호막 형성하는 단계;상기 플러그를 포함한 보호막 상에 제 2 배선용 도전층을 형성하는 단계;상기 보호막 상의 도전층을 식각하여 제 2 배선층을 형성하는 단계를 포함하는 금속 배선 형성 방법.
- 제 1 항에 있어서,상기 보호막을 절연막으로 형성함을 특징으로 하는 금속 배선 형성 방법.
- 제 1 항에 있어서,상기 보호막을 감광막이 산화되어 형성된 산화막으로 형성함을 특징으로 하는 금속 배선 형성 방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020010037478A KR100735630B1 (ko) | 2001-06-28 | 2001-06-28 | 금속 배선 형성 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020010037478A KR100735630B1 (ko) | 2001-06-28 | 2001-06-28 | 금속 배선 형성 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20030001791A KR20030001791A (ko) | 2003-01-08 |
KR100735630B1 true KR100735630B1 (ko) | 2007-07-04 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020010037478A KR100735630B1 (ko) | 2001-06-28 | 2001-06-28 | 금속 배선 형성 방법 |
Country Status (1)
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KR (1) | KR100735630B1 (ko) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1050956A (ja) * | 1996-08-01 | 1998-02-20 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
JP2000252358A (ja) * | 1999-03-03 | 2000-09-14 | Sony Corp | 多層配線の形成方法 |
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2001
- 2001-06-28 KR KR1020010037478A patent/KR100735630B1/ko active IP Right Grant
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1050956A (ja) * | 1996-08-01 | 1998-02-20 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
JP2000252358A (ja) * | 1999-03-03 | 2000-09-14 | Sony Corp | 多層配線の形成方法 |
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Publication number | Publication date |
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KR20030001791A (ko) | 2003-01-08 |
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