KR100347685B1 - 스테틱 반도체 기억 장치 - Google Patents

스테틱 반도체 기억 장치 Download PDF

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Publication number
KR100347685B1
KR100347685B1 KR1019980039707A KR19980039707A KR100347685B1 KR 100347685 B1 KR100347685 B1 KR 100347685B1 KR 1019980039707 A KR1019980039707 A KR 1019980039707A KR 19980039707 A KR19980039707 A KR 19980039707A KR 100347685 B1 KR100347685 B1 KR 100347685B1
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KR
South Korea
Prior art keywords
transistor
pair
word line
memory cell
transistors
Prior art date
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Expired - Fee Related
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KR1019980039707A
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English (en)
Korean (ko)
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KR19990081758A (ko
Inventor
히로따다 구리야마
시게노부 마에다
Original Assignee
미쓰비시덴키 가부시키가이샤
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Publication of KR19990081758A publication Critical patent/KR19990081758A/ko
Application granted granted Critical
Publication of KR100347685B1 publication Critical patent/KR100347685B1/ko
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell

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  • Semiconductor Memories (AREA)
KR1019980039707A 1998-04-16 1998-09-24 스테틱 반도체 기억 장치 Expired - Fee Related KR100347685B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP98-106385 1998-04-16
JP10106385A JPH11297856A (ja) 1998-04-16 1998-04-16 スタティック半導体記憶装置

Publications (2)

Publication Number Publication Date
KR19990081758A KR19990081758A (ko) 1999-11-15
KR100347685B1 true KR100347685B1 (ko) 2002-09-18

Family

ID=14432248

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019980039707A Expired - Fee Related KR100347685B1 (ko) 1998-04-16 1998-09-24 스테틱 반도체 기억 장치

Country Status (6)

Country Link
US (2) US6359804B2 (enExample)
JP (1) JPH11297856A (enExample)
KR (1) KR100347685B1 (enExample)
CN (1) CN1154189C (enExample)
FR (1) FR2777686A1 (enExample)
TW (1) TW396603B (enExample)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3589168B2 (ja) * 2000-09-04 2004-11-17 セイコーエプソン株式会社 半導体装置
KR100422468B1 (ko) * 2001-07-31 2004-03-11 삼성전자주식회사 에스 오 아이 소자 및 그 제조방법
JP2003203993A (ja) * 2002-01-10 2003-07-18 Mitsubishi Electric Corp 半導体記憶装置及びその製造方法
US6836421B2 (en) * 2002-08-02 2004-12-28 Unity Semiconductor Corporation Line drivers that fit within a specified line pitch
FR2843481B1 (fr) * 2002-08-08 2005-09-16 Soisic Memoire sur substrat du type silicium sur isolant
KR100450683B1 (ko) * 2002-09-04 2004-10-01 삼성전자주식회사 Ｓｏｉ 기판에 형성되는 에스램 디바이스
US6762464B2 (en) * 2002-09-17 2004-07-13 Intel Corporation N-p butting connections on SOI substrates
US20060267059A1 (en) * 2005-05-25 2006-11-30 Macronix International Co., Ltd. Peripheral circuit architecture for array memory
US9230910B2 (en) 2006-03-09 2016-01-05 Tela Innovations, Inc. Oversized contacts and vias in layout defined by linearly constrained topology
US9563733B2 (en) 2009-05-06 2017-02-07 Tela Innovations, Inc. Cell circuit and layout with linear finfet structures
US7908578B2 (en) 2007-08-02 2011-03-15 Tela Innovations, Inc. Methods for designing semiconductor device with dynamic array section
US7446352B2 (en) 2006-03-09 2008-11-04 Tela Innovations, Inc. Dynamic array architecture
US8839175B2 (en) 2006-03-09 2014-09-16 Tela Innovations, Inc. Scalable meta-data objects
US7763534B2 (en) 2007-10-26 2010-07-27 Tela Innovations, Inc. Methods, structures and designs for self-aligning local interconnects used in integrated circuits
US8653857B2 (en) 2006-03-09 2014-02-18 Tela Innovations, Inc. Circuitry and layouts for XOR and XNOR logic
US9035359B2 (en) 2006-03-09 2015-05-19 Tela Innovations, Inc. Semiconductor chip including region including linear-shaped conductive structures forming gate electrodes and having electrical connection areas arranged relative to inner region between transistors of different types and associated methods
US8658542B2 (en) 2006-03-09 2014-02-25 Tela Innovations, Inc. Coarse grid design methods and structures
US9009641B2 (en) 2006-03-09 2015-04-14 Tela Innovations, Inc. Circuits with linear finfet structures
US8448102B2 (en) 2006-03-09 2013-05-21 Tela Innovations, Inc. Optimizing layout of irregular structures in regular layout context
US8541879B2 (en) 2007-12-13 2013-09-24 Tela Innovations, Inc. Super-self-aligned contacts and method for making the same
US7956421B2 (en) 2008-03-13 2011-06-07 Tela Innovations, Inc. Cross-coupled transistor layouts in restricted gate level layout architecture
US8667443B2 (en) 2007-03-05 2014-03-04 Tela Innovations, Inc. Integrated circuit cell library for multiple patterning
US8453094B2 (en) 2008-01-31 2013-05-28 Tela Innovations, Inc. Enforcement of semiconductor structure regularity for localized transistors and interconnect
US7939443B2 (en) 2008-03-27 2011-05-10 Tela Innovations, Inc. Methods for multi-wire routing and apparatus implementing same
KR101739709B1 (ko) 2008-07-16 2017-05-24 텔라 이노베이션스, 인코포레이티드 동적 어레이 아키텍쳐에서의 셀 페이징과 배치를 위한 방법 및 그 구현
US9122832B2 (en) 2008-08-01 2015-09-01 Tela Innovations, Inc. Methods for controlling microloading variation in semiconductor wafer layout and fabrication
US8661392B2 (en) 2009-10-13 2014-02-25 Tela Innovations, Inc. Methods for cell boundary encroachment and layouts implementing the Same
JP5588298B2 (ja) * 2010-10-14 2014-09-10 株式会社東芝 半導体装置
US9159627B2 (en) 2010-11-12 2015-10-13 Tela Innovations, Inc. Methods for linewidth modification and apparatus implementing the same
US9496854B2 (en) 2015-03-10 2016-11-15 International Business Machines Corporation High-speed latch circuits by selective use of large gate pitch

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01185966A (ja) * 1988-01-21 1989-07-25 Nec Corp 半導体記憶装置
JPH0945796A (ja) * 1995-07-31 1997-02-14 Mitsubishi Electric Corp 半導体記憶装置

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4657628A (en) * 1985-05-01 1987-04-14 Texas Instruments Incorporated Process for patterning local interconnects
JPH07105449B2 (ja) * 1990-02-16 1995-11-13 三菱電機株式会社 半導体記憶装置
JP3771283B2 (ja) * 1993-09-29 2006-04-26 株式会社ルネサステクノロジ 半導体集積回路装置
JP3237346B2 (ja) * 1993-10-29 2001-12-10 ソニー株式会社 半導体記憶装置
JPH07130877A (ja) * 1993-11-05 1995-05-19 Sony Corp 完全ｃｍｏｓ型スタティック記憶セル
JPH07176633A (ja) * 1993-12-20 1995-07-14 Nec Corp Ｃｍｏｓ型スタティックメモリ
JP2601176B2 (ja) * 1993-12-22 1997-04-16 日本電気株式会社 半導体記憶装置
JPH07183475A (ja) * 1993-12-24 1995-07-21 Nec Corp 半導体集積回路装置
JPH0897297A (ja) * 1994-09-27 1996-04-12 Hitachi Ltd 半導体集積回路装置
JPH08130254A (ja) * 1994-10-31 1996-05-21 Mitsubishi Electric Corp 半導体記憶装置
JP3446358B2 (ja) 1994-12-28 2003-09-16 ソニー株式会社 半導体記憶装置
JPH1056082A (ja) * 1996-08-07 1998-02-24 Mitsubishi Electric Corp 半導体集積回路装置及びその製造方法
TW340975B (en) * 1996-08-30 1998-09-21 Toshiba Co Ltd Semiconductor memory
JPH10172287A (ja) * 1996-12-05 1998-06-26 Mitsubishi Electric Corp スタティック型半導体記憶装置
US6150687A (en) * 1997-07-08 2000-11-21 Micron Technology, Inc. Memory cell having a vertical transistor with buried source/drain and dual gates
US5843816A (en) * 1997-07-28 1998-12-01 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated self-aligned butt contact process flow and structure for six transistor full complementary metal oxide semiconductor static random access memory cell
KR100265763B1 (ko) * 1997-12-31 2000-09-15 윤종용 스태틱 랜덤 억세스 메모리 장치 및 그 제조방법

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01185966A (ja) * 1988-01-21 1989-07-25 Nec Corp 半導体記憶装置
JPH0945796A (ja) * 1995-07-31 1997-02-14 Mitsubishi Electric Corp 半導体記憶装置

Also Published As

Publication number Publication date
CN1232296A (zh) 1999-10-20
US20020003241A1 (en) 2002-01-10
JPH11297856A (ja) 1999-10-29
TW396603B (en) 2000-07-01
US6359804B2 (en) 2002-03-19
CN1154189C (zh) 2004-06-16
US6657885B2 (en) 2003-12-02
KR19990081758A (ko) 1999-11-15
FR2777686A1 (fr) 1999-10-22
US20020067636A1 (en) 2002-06-06

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