KR100297064B1 - 반도체 장치의 제작방법 - Google Patents

반도체 장치의 제작방법 Download PDF

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Publication number
KR100297064B1
KR100297064B1 KR1019960041022A KR19960041022A KR100297064B1 KR 100297064 B1 KR100297064 B1 KR 100297064B1 KR 1019960041022 A KR1019960041022 A KR 1019960041022A KR 19960041022 A KR19960041022 A KR 19960041022A KR 100297064 B1 KR100297064 B1 KR 100297064B1
Authority
KR
South Korea
Prior art keywords
wiring
forming
insulating film
electrode
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1019960041022A
Other languages
English (en)
Korean (ko)
Inventor
순페이 야마자끼
준 고야마
야수시 오가타
사토시 테라모토
Original Assignee
순페이 야마자끼
가부시키가이샤 한도오따이 에네루기 켄큐쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 순페이 야마자끼, 가부시키가이샤 한도오따이 에네루기 켄큐쇼 filed Critical 순페이 야마자끼
Application granted granted Critical
Publication of KR100297064B1 publication Critical patent/KR100297064B1/ko
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13454Drivers integrated on the active matrix substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/031Manufacture or treatment of conductive parts of the interconnections

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019960041022A 1995-09-21 1996-09-20 반도체 장치의 제작방법 Expired - Lifetime KR100297064B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP26794295 1995-09-21
JP95-267942 1995-09-21

Publications (1)

Publication Number Publication Date
KR100297064B1 true KR100297064B1 (ko) 2001-10-24

Family

ID=17451750

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960041022A Expired - Lifetime KR100297064B1 (ko) 1995-09-21 1996-09-20 반도체 장치의 제작방법

Country Status (4)

Country Link
US (1) US6013542A (https=)
KR (1) KR100297064B1 (https=)
DE (1) DE19638433B4 (https=)
TW (1) TW318261B (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6893980B1 (en) * 1996-12-03 2005-05-17 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method therefor
KR100276225B1 (ko) * 1998-06-01 2000-12-15 구본준 액정표시장치의 패드 단락 방지구조 및 그 방법
US6140162A (en) * 1998-06-19 2000-10-31 Lg Electronics Inc. Reduction of masking and doping steps in a method of fabricating a liquid crystal display
US6506635B1 (en) 1999-02-12 2003-01-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, and method of forming the same
JP3954532B2 (ja) * 2003-06-13 2007-08-08 沖電気工業株式会社 Soi半導体装置の製造方法及びsoi半導体装置
TWI366701B (en) * 2004-01-26 2012-06-21 Semiconductor Energy Lab Method of manufacturing display and television
US7371625B2 (en) * 2004-02-13 2008-05-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof, liquid crystal television system, and EL television system
US7183147B2 (en) 2004-03-25 2007-02-27 Semiconductor Energy Laboratory Co., Ltd. Light emitting device, method for manufacturing thereof and electronic appliance
KR101845480B1 (ko) 2010-06-25 2018-04-04 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치의 제작 방법
TWI611582B (zh) 2013-04-10 2018-01-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1213261B (it) * 1984-12-20 1989-12-14 Sgs Thomson Microelectronics Dispositivo a semiconduttore con metallizzazione a piu' spessori eprocedimento per la sua fabbricazione.
US4740485A (en) * 1986-07-22 1988-04-26 Monolithic Memories, Inc. Method for forming a fuse
JPH01248536A (ja) * 1988-03-30 1989-10-04 Toshiba Corp 半導体装置の製造方法
JPH02285658A (ja) * 1989-04-26 1990-11-22 Nec Corp 半導体装置の製造方法
JP3009438B2 (ja) * 1989-08-14 2000-02-14 株式会社日立製作所 液晶表示装置
JPH04302166A (ja) * 1991-03-29 1992-10-26 Matsushita Electron Corp 半導体装置の製造方法
JP3019453B2 (ja) * 1991-03-30 2000-03-13 日本電気株式会社 半導体装置の製造方法
US5219793A (en) * 1991-06-03 1993-06-15 Motorola Inc. Method for forming pitch independent contacts and a semiconductor device having the same
JP3166221B2 (ja) * 1991-07-23 2001-05-14 日本電気株式会社 半導体装置及びその製造方法
US5422293A (en) * 1991-12-24 1995-06-06 Casio Computer Co., Ltd. Method for manufacturing a TFT panel
US5258328A (en) * 1992-03-16 1993-11-02 Kabushiki Kaisha Toshiba Method of forming multilayered wiring structure of semiconductor device
KR950008931B1 (ko) * 1992-07-22 1995-08-09 삼성전자주식회사 표시패널의 제조방법
JPH07221174A (ja) * 1993-12-10 1995-08-18 Canon Inc 半導体装置及びその製造方法
US5470790A (en) * 1994-10-17 1995-11-28 Intel Corporation Via hole profile and method of fabrication

Also Published As

Publication number Publication date
DE19638433B4 (de) 2007-01-25
DE19638433A1 (de) 1997-03-27
TW318261B (https=) 1997-10-21
US6013542A (en) 2000-01-11

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