KR100286192B1 - 반도체 웨이퍼의 처리방법 - Google Patents

반도체 웨이퍼의 처리방법 Download PDF

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Publication number
KR100286192B1
KR100286192B1 KR1019950700006A KR19950700006A KR100286192B1 KR 100286192 B1 KR100286192 B1 KR 100286192B1 KR 1019950700006 A KR1019950700006 A KR 1019950700006A KR 19950700006 A KR19950700006 A KR 19950700006A KR 100286192 B1 KR100286192 B1 KR 100286192B1
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KR
South Korea
Prior art keywords
wafer
layer
vapor
compound
polymer layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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KR1019950700006A
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English (en)
Korean (ko)
Inventor
크리스토퍼 데이비드 돕슨
Original Assignee
트리콘 이큅먼츠 리미티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB929214243A external-priority patent/GB9214243D0/en
Priority claimed from GB929221520A external-priority patent/GB9221520D0/en
Priority claimed from GB929221519A external-priority patent/GB9221519D0/en
Application filed by 트리콘 이큅먼츠 리미티드 filed Critical 트리콘 이큅먼츠 리미티드
Application granted granted Critical
Publication of KR100286192B1 publication Critical patent/KR100286192B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H10P72/0402—
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D1/00—Processes for applying liquids or other fluent materials
    • B05D1/60—Deposition of organic layers from vapour phase
    • H10P14/6506—
    • H10P14/6538—
    • H10P14/6548—
    • H10P14/6682—
    • H10P14/6334—
    • H10P14/6686—
    • H10P14/6905—
    • H10P14/69215—
    • H10P14/6922—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/935—Gas flow control

Landscapes

  • Formation Of Insulating Films (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Treatments Of Macromolecular Shaped Articles (AREA)
  • Element Separation (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Vapour Deposition (AREA)
  • Polymerisation Methods In General (AREA)
KR1019950700006A 1992-01-01 1993-06-30 반도체 웨이퍼의 처리방법 Expired - Fee Related KR100286192B1 (ko)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
GB929214243A GB9214243D0 (en) 1992-07-04 1992-07-04 A method of treating a semi-conductor wafer
GB9214243.9 1992-07-04
GB9221520.1 1992-10-14
GB929221520A GB9221520D0 (en) 1992-10-14 1992-10-14 A method of treating a semiconductor wafer
GB929221519A GB9221519D0 (en) 1992-10-14 1992-10-14 A method of treating a semi-conductor wafer
GB9221519.3 1992-10-14
PCT/GB1993/001368 WO1994001885A1 (en) 1992-07-04 1993-06-30 A method of treating a semiconductor wafer

Publications (1)

Publication Number Publication Date
KR100286192B1 true KR100286192B1 (ko) 2001-04-16

Family

ID=27266279

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950700006A Expired - Fee Related KR100286192B1 (ko) 1992-01-01 1993-06-30 반도체 웨이퍼의 처리방법

Country Status (11)

Country Link
US (2) US5874367A (cg-RX-API-DMAC10.html)
EP (1) EP0731982B1 (cg-RX-API-DMAC10.html)
JP (1) JP3262334B2 (cg-RX-API-DMAC10.html)
KR (1) KR100286192B1 (cg-RX-API-DMAC10.html)
CN (1) CN1042577C (cg-RX-API-DMAC10.html)
AT (1) ATE187277T1 (cg-RX-API-DMAC10.html)
AU (1) AU4506993A (cg-RX-API-DMAC10.html)
CA (1) CA2137928C (cg-RX-API-DMAC10.html)
DE (1) DE69327176T2 (cg-RX-API-DMAC10.html)
TW (1) TW253974B (cg-RX-API-DMAC10.html)
WO (1) WO1994001885A1 (cg-RX-API-DMAC10.html)

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JP3045928B2 (ja) * 1994-06-28 2000-05-29 松下電子工業株式会社 半導体装置およびその製造方法
JP3281209B2 (ja) 1995-01-30 2002-05-13 株式会社東芝 半導体装置の製造方法
FR2734402B1 (fr) 1995-05-15 1997-07-18 Brouquet Pierre Procede pour l'isolement electrique en micro-electronique, applicable aux cavites etroites, par depot d'oxyde a l'etat visqueux et dispositif correspondant

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DE69327176T2 (de) 2000-05-31
TW253974B (cg-RX-API-DMAC10.html) 1995-08-11
CA2137928A1 (en) 1994-01-20
DE69327176D1 (de) 2000-01-05
ATE187277T1 (de) 1999-12-15
WO1994001885A1 (en) 1994-01-20
EP0731982A1 (en) 1996-09-18
US5874367A (en) 1999-02-23
US6287989B1 (en) 2001-09-11
EP0731982B1 (en) 1999-12-01
CN1089757A (zh) 1994-07-20
JPH09502301A (ja) 1997-03-04
JP3262334B2 (ja) 2002-03-04
AU4506993A (en) 1994-01-31
CN1042577C (zh) 1999-03-17
CA2137928C (en) 2002-01-29

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