KR100262400B1 - 반도체 소자의 평탄화방법 - Google Patents

반도체 소자의 평탄화방법 Download PDF

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Publication number
KR100262400B1
KR100262400B1 KR1019950042291A KR19950042291A KR100262400B1 KR 100262400 B1 KR100262400 B1 KR 100262400B1 KR 1019950042291 A KR1019950042291 A KR 1019950042291A KR 19950042291 A KR19950042291 A KR 19950042291A KR 100262400 B1 KR100262400 B1 KR 100262400B1
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KR
South Korea
Prior art keywords
film
heat treatment
bpsg
bpsg film
temperature
Prior art date
Application number
KR1019950042291A
Other languages
English (en)
Korean (ko)
Other versions
KR970030476A (ko
Inventor
박인옥
정영석
김의식
Original Assignee
김영환
현대전자산업주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김영환, 현대전자산업주식회사 filed Critical 김영환
Priority to KR1019950042291A priority Critical patent/KR100262400B1/ko
Priority to DE19648082A priority patent/DE19648082C2/de
Priority to JP8324638A priority patent/JP2799858B2/ja
Priority to CN96123330A priority patent/CN1080928C/zh
Priority to GB9624132A priority patent/GB2307344B/en
Priority to TW085114291A priority patent/TW442872B/zh
Publication of KR970030476A publication Critical patent/KR970030476A/ko
Priority to US09/065,982 priority patent/US6169026B1/en
Application granted granted Critical
Publication of KR100262400B1 publication Critical patent/KR100262400B1/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/31051Planarisation of the insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76819Smoothing of the dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Chemical Vapour Deposition (AREA)
KR1019950042291A 1995-11-20 1995-11-20 반도체 소자의 평탄화방법 KR100262400B1 (ko)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1019950042291A KR100262400B1 (ko) 1995-11-20 1995-11-20 반도체 소자의 평탄화방법
DE19648082A DE19648082C2 (de) 1995-11-20 1996-11-20 Verfahren zur Einebnung einer Halbleitereinrichtung
JP8324638A JP2799858B2 (ja) 1995-11-20 1996-11-20 半導体デバイスの平坦化方法
CN96123330A CN1080928C (zh) 1995-11-20 1996-11-20 半导体器件的平整方法
GB9624132A GB2307344B (en) 1995-11-20 1996-11-20 Method for planarization of semiconductor device
TW085114291A TW442872B (en) 1995-11-20 1996-11-20 Method for planarization of semiconductor device
US09/065,982 US6169026B1 (en) 1995-11-20 1998-04-24 Method for planarization of semiconductor device including pumping out dopants from planarization layer separately from flowing said layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950042291A KR100262400B1 (ko) 1995-11-20 1995-11-20 반도체 소자의 평탄화방법

Publications (2)

Publication Number Publication Date
KR970030476A KR970030476A (ko) 1997-06-26
KR100262400B1 true KR100262400B1 (ko) 2000-09-01

Family

ID=19434734

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950042291A KR100262400B1 (ko) 1995-11-20 1995-11-20 반도체 소자의 평탄화방법

Country Status (6)

Country Link
JP (1) JP2799858B2 (de)
KR (1) KR100262400B1 (de)
CN (1) CN1080928C (de)
DE (1) DE19648082C2 (de)
GB (1) GB2307344B (de)
TW (1) TW442872B (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100256232B1 (ko) * 1997-06-30 2000-05-15 김영환 반도체소자의층간절연막형성방법
JP3229276B2 (ja) * 1998-12-04 2001-11-19 キヤノン販売株式会社 成膜方法及び半導体装置の製造方法
JP3824469B2 (ja) * 2000-04-03 2006-09-20 シャープ株式会社 固体撮像装置、及びその製造方法
KR100506054B1 (ko) * 2000-12-28 2005-08-05 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US7226873B2 (en) * 2004-11-22 2007-06-05 Taiwan Semiconductor Manufacturing Co., Ltd. Method of improving via filling uniformity in isolated and dense via-pattern regions
KR20120098095A (ko) * 2011-02-28 2012-09-05 에스케이하이닉스 주식회사 반도체장치 제조 방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR930011118A (ko) * 1991-11-19 1993-06-23 정몽헌 표면결정성 석출물 발생방지를 위한 bpsg층 형성방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03237744A (ja) * 1990-02-14 1991-10-23 Matsushita Electron Corp 半導体装置の製造方法
JP2874972B2 (ja) * 1990-07-11 1999-03-24 株式会社東芝 半導体装置の製造方法
US5268333A (en) * 1990-12-19 1993-12-07 Samsung Electronics Co., Ltd. Method of reflowing a semiconductor device
JP2538722B2 (ja) * 1991-06-20 1996-10-02 株式会社半導体プロセス研究所 半導体装置の製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR930011118A (ko) * 1991-11-19 1993-06-23 정몽헌 표면결정성 석출물 발생방지를 위한 bpsg층 형성방법

Also Published As

Publication number Publication date
CN1080928C (zh) 2002-03-13
CN1159076A (zh) 1997-09-10
JP2799858B2 (ja) 1998-09-21
DE19648082C2 (de) 2000-03-23
TW442872B (en) 2001-06-23
GB2307344B (en) 2000-05-17
KR970030476A (ko) 1997-06-26
GB9624132D0 (en) 1997-01-08
GB2307344A (en) 1997-05-21
DE19648082A1 (de) 1997-05-22
JPH1092826A (ja) 1998-04-10

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