KR0162640B1 - 시간축 발생기 회로와 동일 주파수의 2개의 기준 신호 발생방법 - Google Patents

시간축 발생기 회로와 동일 주파수의 2개의 기준 신호 발생방법 Download PDF

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Publication number
KR0162640B1
KR0162640B1 KR1019900013469A KR900013469A KR0162640B1 KR 0162640 B1 KR0162640 B1 KR 0162640B1 KR 1019900013469 A KR1019900013469 A KR 1019900013469A KR 900013469 A KR900013469 A KR 900013469A KR 0162640 B1 KR0162640 B1 KR 0162640B1
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South Korea
Prior art keywords
frequency
time
signal
output
divider
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Expired - Lifetime
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KR1019900013469A
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Korean (ko)
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KR910007267A (ko
Inventor
클리프 스와프 마빈
Original Assignee
빈센트 죠셉 로너
모토로라 인코포레이티드
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Publication of KR910007267A publication Critical patent/KR910007267A/ko
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Publication of KR0162640B1 publication Critical patent/KR0162640B1/ko
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15006Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two programmable outputs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Electric Clocks (AREA)
  • Manipulation Of Pulses (AREA)
  • Measurement Of Unknown Time Intervals (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
KR1019900013469A 1989-09-05 1990-08-30 시간축 발생기 회로와 동일 주파수의 2개의 기준 신호 발생방법 Expired - Lifetime KR0162640B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US403,271 1989-09-05
US07/403,271 US4943787A (en) 1989-09-05 1989-09-05 Digital time base generator with adjustable delay between two outputs

Publications (2)

Publication Number Publication Date
KR910007267A KR910007267A (ko) 1991-04-30
KR0162640B1 true KR0162640B1 (ko) 1999-03-20

Family

ID=23595173

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900013469A Expired - Lifetime KR0162640B1 (ko) 1989-09-05 1990-08-30 시간축 발생기 회로와 동일 주파수의 2개의 기준 신호 발생방법

Country Status (7)

Country Link
US (1) US4943787A (enExample)
EP (1) EP0419823B1 (enExample)
JP (1) JP2730280B2 (enExample)
KR (1) KR0162640B1 (enExample)
DE (1) DE69027493T2 (enExample)
MY (1) MY105977A (enExample)
TW (1) TW223716B (enExample)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5077686A (en) * 1990-01-31 1991-12-31 Stardent Computer Clock generator for a computer system
GB9117635D0 (en) * 1991-08-15 1991-10-02 British Telecomm Phase shifter
US5329250A (en) * 1992-02-25 1994-07-12 Sanyo Electric Co., Ltd. Double phase locked loop circuit
JP2945545B2 (ja) * 1992-04-02 1999-09-06 三菱電機株式会社 Pll回路装置および位相差検出回路装置
US5336939A (en) * 1992-05-08 1994-08-09 Cyrix Corporation Stable internal clock generation for an integrated circuit
US5317284A (en) * 1993-02-08 1994-05-31 Hughes Aircraft Company Wide band, low noise, fine step tuning, phase locked loop frequency synthesizer
US5317285A (en) * 1993-02-26 1994-05-31 Motorola, Inc. Frequency synthesizer employing a continuously adaptive phase detector and method
US5391996A (en) * 1993-11-19 1995-02-21 General Instrument Corporation Of Delaware Techniques for generating two high frequency signals with a constant phase difference over a wide frequency band
US5642039A (en) * 1994-12-22 1997-06-24 Wiltron Company Handheld vector network analyzer
US6020733A (en) * 1994-12-22 2000-02-01 Anritsu Company Two port handheld vector network analyzer with frequency monitor mode
US5796682A (en) * 1995-10-30 1998-08-18 Motorola, Inc. Method for measuring time and structure therefor
US6049241A (en) * 1997-02-28 2000-04-11 Texas Instruments Incorporated Clock skew circuit
US5977779A (en) * 1997-10-24 1999-11-02 Anritsu Company Handheld vecor network analyzer (VNA) operating at a high frequency by mixing LO and RF signals having offset odd harmonics
US6356129B1 (en) * 1999-10-12 2002-03-12 Teradyne, Inc. Low jitter phase-locked loop with duty-cycle control
US6807225B1 (en) * 2000-05-31 2004-10-19 Conexant Systems, Inc. Circuit and method for self trimming frequency acquisition
KR100374023B1 (ko) * 2000-08-24 2003-02-26 온재륜 신발창 성형프레스 자동화 장치
EP1209809A1 (en) * 2000-11-24 2002-05-29 STMicroelectronics S.r.l. Device and method for generating synchronous numeric signals
US6492926B2 (en) 2000-11-24 2002-12-10 Stmicroelectronics S.R.L. Noise compensation device and method in a discrete time control system
US6791382B1 (en) * 2002-04-08 2004-09-14 Etron Technology, Inc. Noise reduction method and system for a multiple clock, mixed signal integrated circuit
FR2848038B1 (fr) * 2002-11-29 2005-12-02 Thales Sa Dispositif et procede de synthese de frequence a grande purete spectrale
US7256633B1 (en) 2003-05-01 2007-08-14 Ample Communications, Inc. Systems for implementing high speed and high integration chips
CN100521535C (zh) * 2003-06-13 2009-07-29 钰创科技股份有限公司 内含多重频率数字电路的集成电路噪声降低方法和系统
US7586344B1 (en) * 2007-10-16 2009-09-08 Lattice Semiconductor Corporation Dynamic delay or advance adjustment of oscillating signal phase
EP2207263B1 (en) 2009-01-08 2012-11-28 Siemens Aktiengesellschaft A digital time base generator and method for providing a first clock signal and a second clock signal
EP2495634B1 (en) * 2011-03-01 2015-08-26 Siemens Aktiengesellschaft A time base generator and method for providing a first clock signal and a second clock signal
EP3301472B1 (en) * 2016-09-30 2020-10-28 Rosemount Tank Radar AB Pulsed radar level gauge with single oscillator
WO2018060352A1 (en) * 2016-09-30 2018-04-05 Rosemount Tank Radar Ab Pulsed radar level gauge with single oscillator
US10132671B2 (en) 2016-09-30 2018-11-20 Rosemount Tank Radar Ab Pulsed radar level gauge with single oscillator
TWI600284B (zh) 2016-11-16 2017-09-21 國立清華大學 數值尋找器以及數值尋找方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3961269A (en) * 1975-05-22 1976-06-01 Teletype Corporation Multiple phase clock generator
JPS5881337A (ja) * 1981-11-10 1983-05-16 Hitachi Denshi Ltd 周波数シンセサイザ
JPS6315517A (ja) * 1986-07-08 1988-01-22 Nec Corp クロツク発生回路
JPS63238714A (ja) * 1986-11-26 1988-10-04 Hitachi Ltd クロック供給システム
JPH01149517A (ja) * 1987-12-04 1989-06-12 Nec Corp クロック位相差検出方式
US4833425A (en) * 1988-03-25 1989-05-23 International Business Machines Corporation Analog macro embedded in a digital gate array

Also Published As

Publication number Publication date
TW223716B (enExample) 1994-05-11
DE69027493T2 (de) 1997-01-02
DE69027493D1 (de) 1996-07-25
US4943787A (en) 1990-07-24
EP0419823B1 (en) 1996-06-19
MY105977A (en) 1995-02-28
JPH0399519A (ja) 1991-04-24
JP2730280B2 (ja) 1998-03-25
KR910007267A (ko) 1991-04-30
EP0419823A1 (en) 1991-04-03

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