JPWO2016039074A1 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 48
- 238000004519 manufacturing process Methods 0.000 title claims description 23
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 67
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 67
- 239000011229 interlayer Substances 0.000 claims abstract description 50
- 239000010410 layer Substances 0.000 claims abstract description 48
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 239000002344 surface layer Substances 0.000 claims abstract description 11
- 238000010438 heat treatment Methods 0.000 claims description 11
- 239000002184 metal Substances 0.000 abstract description 4
- 229910052751 metal Inorganic materials 0.000 abstract description 4
- 238000009413 insulation Methods 0.000 abstract 1
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 29
- 238000000034 method Methods 0.000 description 11
- 230000004888 barrier function Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 8
- 229910021332 silicide Inorganic materials 0.000 description 7
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 7
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 6
- 230000006866 deterioration Effects 0.000 description 6
- 239000010936 titanium Substances 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 229910018125 Al-Si Inorganic materials 0.000 description 1
- 229910018520 Al—Si Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- MXSJNBRAMXILSE-UHFFFAOYSA-N [Si].[P].[B] Chemical compound [Si].[P].[B] MXSJNBRAMXILSE-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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Abstract
Description
図1は、本発明の半導体装置の実施例1におけるMOSFETの断面構造図である。なお、本実施例では第1導電型をN型、第2導電型をP型としているが、これを逆に形成することも可能である。
図7は、本発明の半導体装置の実施例2におけるMOSFETの断面構造図である。実施例2が実施例1と異なるのは、ゲート電極7の終端部分に傾斜を設けることである。この傾斜を有するゲート電極7により、ゲート電極7を覆う層間絶縁膜8についても、ソースコンタクトホール付近には傾斜が形成され、平坦な部分が形成されないようにできる。
2 N型炭化珪素層
3 P型領域
4 N型ソース領域
5 P型コンタクト領域
6 ゲート絶縁膜
7 ゲート電極
8 層間絶縁膜
9 第1のソース電極
10 第2のソース電極
11 ドレイン電極
12 P型領域
13 P型炭化珪素層
14 N型領域
15 バリア膜
21 余剰Niの塊
Claims (7)
- 第1導電型炭化珪素基板と、前記第1導電型炭化珪素基板のおもて面側に形成された低濃度の第1導電型炭化珪素層と、前記第1導電型炭化珪素層の表面層に選択的に形成された第2導電型領域と、前記第2導電型領域内に形成された第1導電型半導体領域と、前記第2導電型領域の、前記第1導電型炭化珪素層と前記第1導電型半導体領域との間の領域に接して設けられたゲート絶縁膜と、前記ゲート絶縁膜を挟んで前記第2導電型領域の反対側に設けられたゲート電極と、前記ゲート電極を覆う層間絶縁膜と、前記第2導電型領域および前記第1導電型半導体領域の表面に電気的に接続するように形成されたソース電極と、を備え、
前記ゲート電極を覆う前記層間絶縁膜の端部が所定角度の傾斜を有することを特徴とする半導体装置。 - 前記層間絶縁膜の前記傾斜は、ソースコンタクトホール部分に形成されていることを特徴とする請求項1に記載の半導体装置。
- 前記ゲート電極は、終端部分に傾斜を有し、
前記ゲート電極を覆う前記層間絶縁膜が前記ゲート電極の傾斜に対応した所定角度の傾斜を有することを特徴とする請求項1に記載の半導体装置。 - 前記層間絶縁膜の前記傾斜の傾斜角は25°〜75°であることを特徴とする請求項1〜3のいずれか一つに記載の半導体装置。
- 第1導電型炭化珪素基板と、前記第1導電型炭化珪素基板のおもて面側に形成された低濃度の第1導電型炭化珪素層と、前記第1導電型炭化珪素層の表面層に選択的に形成された第2導電型領域と、前記第2導電型領域内に形成された第1導電型半導体領域と、前記第2導電型領域の、前記第1導電型炭化珪素層と前記第1導電型半導体領域との間の領域に接して設けられたゲート絶縁膜と、前記ゲート絶縁膜を挟んで前記第2導電型領域の反対側に設けられたゲート電極と、前記ゲート電極を覆う層間絶縁膜と、前記第2導電型領域および前記第1導電型半導体領域の表面に電気的に接続するように形成されたソース電極と、を備えた半導体装置の製造方法において、
前記ゲート電極を覆う前記層間絶縁膜の端部に所定角度の傾斜を形成することを特徴とする半導体装置の製造方法。 - 前記第1導電型炭化珪素基板のおもて面側に前記ゲート絶縁膜と前記ゲート電極を形成する第1工程と、
前記第1工程の後に前記ゲート電極を覆うように前記層間絶縁膜を形成する第2工程と、
前記第2工程の後に熱処理により、ソースコンタクトホール付近の前記層間絶縁膜に傾斜を形成する第3工程と、
を含むことを特徴とする請求項5に記載の半導体装置の製造方法。 - 前記第1導電型炭化珪素基板のおもて面側に前記ゲート絶縁膜を形成し、終端部分に傾斜を有して前記ゲート電極を形成する第1工程と、
前記第1工程の後に前記ゲート電極を覆うように前記層間絶縁膜を形成する第2工程と、
を含むことを特徴とする請求項5に記載の半導体装置の製造方法。
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JP2018182032A (ja) * | 2017-04-11 | 2018-11-15 | 富士電機株式会社 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
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CN111883581A (zh) * | 2020-07-16 | 2020-11-03 | 安徽瑞迪微电子有限公司 | 一种新型平面栅mos型半导体功率器件及其制造方法 |
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US10204990B2 (en) | 2019-02-12 |
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JP6588447B2 (ja) | 2019-10-09 |
US20170018615A1 (en) | 2017-01-19 |
WO2016039074A1 (ja) | 2016-03-17 |
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